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author | Brox Chen <guochen2@amd.com> | 2025-04-02 16:08:26 -0400 |
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committer | GitHub <noreply@github.com> | 2025-04-02 16:08:26 -0400 |
commit | fb0e7b5f161118a24eeef39b05882f6950be43c0 (patch) | |
tree | 81d127f59c7838bb8e4540c76a6fabe2a4dd1d19 /clang/lib/CodeGen | |
parent | 6f1347d57bdaed75b73b2013a96a4a69c8969ebe (diff) | |
download | llvm-fb0e7b5f161118a24eeef39b05882f6950be43c0.zip llvm-fb0e7b5f161118a24eeef39b05882f6950be43c0.tar.gz llvm-fb0e7b5f161118a24eeef39b05882f6950be43c0.tar.bz2 |
[AMDGPU][True16][CodeGen] Implement sgpr folding in true16 (#128929)
We haven't implemented 16 bit SGPRs. Currently allow 32-bit SGPRs to be
folded into True16 bit instructions taking 16 bit values. Also use
sgpr_32 when Imm is copied to spgr_lo16 so it could be further folded.
This improves generated code quality.
Diffstat (limited to 'clang/lib/CodeGen')
0 files changed, 0 insertions, 0 deletions