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| author | chuongg3 <chuong.goh@arm.com> | 2024-02-15 10:09:20 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-02-15 10:09:20 +0000 |
| commit | f6f8e202f59f54429878f41bcc9aea614613a4af (patch) | |
| tree | 7747f3665f41609699ae5d3f34e89bd6dfd02364 /clang/lib/CodeGen/CodeGenModule.cpp | |
| parent | c6a7c4d70a7c25f73e46b7d2e7e4867c3b78223e (diff) | |
| download | llvm-f6f8e202f59f54429878f41bcc9aea614613a4af.zip llvm-f6f8e202f59f54429878f41bcc9aea614613a4af.tar.gz llvm-f6f8e202f59f54429878f41bcc9aea614613a4af.tar.bz2 | |
[AArch64][GlobalISel] Refactor Combine G_CONCAT_VECTOR (#80866)
The combine now works using tablegen and checks if new instruction is
legal before creating it.
Diffstat (limited to 'clang/lib/CodeGen/CodeGenModule.cpp')
0 files changed, 0 insertions, 0 deletions