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| author | Jack Styles <jack.styles@arm.com> | 2024-10-14 10:38:58 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-10-14 10:38:58 +0100 |
| commit | f3aebe623b49b7ae14d0f0996999114aac052e4b (patch) | |
| tree | f683b46850196af63441bea285614c6b938b99ad /clang/lib/CodeGen/CodeGenModule.cpp | |
| parent | 851817b49427586273a414ead21d8568e08eed94 (diff) | |
| download | llvm-f3aebe623b49b7ae14d0f0996999114aac052e4b.zip llvm-f3aebe623b49b7ae14d0f0996999114aac052e4b.tar.gz llvm-f3aebe623b49b7ae14d0f0996999114aac052e4b.tar.bz2 | |
[llvm][ARM] Add Addend Checks for MOVT and MOVW instructions. (#111970)
Previously, any value could be used for the MOVT and MOVW instructions,
however the ARM ABI dictates that the addend should be a signed 16 bit
value. To ensure this is followed, the Assembler will now check that
when using these instructions, the addend is a 16bit signed value, and
throw an error if this is not the case.
Information relating to the ABI requirements can be found here:
https://github.com/ARM-software/abi-aa/blob/main/aaelf32/aaelf32.rst#addends-and-pc-bias-compensation
Diffstat (limited to 'clang/lib/CodeGen/CodeGenModule.cpp')
0 files changed, 0 insertions, 0 deletions