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| author | eleviant <56861949+eleviant@users.noreply.github.com> | 2023-12-05 20:32:58 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-12-05 20:32:58 +0100 |
| commit | f20af7372fcef3f317743063999403beba630078 (patch) | |
| tree | 8ac14bf67030abb041d6dd0f66b3d8260748e954 /clang/lib/CodeGen/CodeGenModule.cpp | |
| parent | 391a7577e703516dbefd41b3da8f3bbd751c6978 (diff) | |
| download | llvm-f20af7372fcef3f317743063999403beba630078.zip llvm-f20af7372fcef3f317743063999403beba630078.tar.gz llvm-f20af7372fcef3f317743063999403beba630078.tar.bz2 | |
[bolt] Support arm64 FP register spills (#73021)
At the moment llvm-bolt fails when analyzing jump tables on aarch64 in
case FP register spill/reload is used.
Diffstat (limited to 'clang/lib/CodeGen/CodeGenModule.cpp')
0 files changed, 0 insertions, 0 deletions