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| author | Craig Topper <craig.topper@sifive.com> | 2025-01-30 09:03:00 -0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-01-30 09:03:00 -0800 |
| commit | e7e72a9bb48077d1ee161486a6908e1ade79b0b8 (patch) | |
| tree | 4eeb67b0ee68d029141f99b89e2638d1a7268bd8 /clang/lib/CodeGen/CodeGenModule.cpp | |
| parent | a643e449749332e974ce14b12cf3cb270dbf1b1f (diff) | |
| download | llvm-e7e72a9bb48077d1ee161486a6908e1ade79b0b8.zip llvm-e7e72a9bb48077d1ee161486a6908e1ade79b0b8.tar.gz llvm-e7e72a9bb48077d1ee161486a6908e1ade79b0b8.tar.bz2 | |
[RISCV] Add DAG combine for forming VAADDU_VL from VP intrinsics. (#124848)
This adds a VP version of an existing DAG combine. I've put it in
RISCVISelLowering since we would need to add a ISD::VP_AVGCEIL opcode
otherwise.
This pattern appears in 525.264_r.
Diffstat (limited to 'clang/lib/CodeGen/CodeGenModule.cpp')
0 files changed, 0 insertions, 0 deletions