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| author | Chen Zheng <czhengsz@cn.ibm.com> | 2022-04-08 03:16:05 -0400 |
|---|---|---|
| committer | Chen Zheng <czhengsz@cn.ibm.com> | 2022-06-20 22:57:24 -0400 |
| commit | a71fe49bb534fda18edf57284e16d1705fc54879 (patch) | |
| tree | 7112bea9d039dc29ab865363b3d7a5229b55c46f /clang/lib/CodeGen/CodeGenModule.cpp | |
| parent | 16d3a82de53dab4bb5ed468aff92df276f8a6e39 (diff) | |
| download | llvm-a71fe49bb534fda18edf57284e16d1705fc54879.zip llvm-a71fe49bb534fda18edf57284e16d1705fc54879.tar.gz llvm-a71fe49bb534fda18edf57284e16d1705fc54879.tar.bz2 | |
[PowerPC] add a new pass to expand ctr loop pseudos
This patch implements a new way to generate the CTR loops. Now the
intrinsics inserted in hardware loop pass will be mapped to pseudo
instructions and these pseudo instructions will be expanded to CTR
loop or normal compare+branch loop in this post ISEL pass.
Reviewed By: lkail
Differential Revision: https://reviews.llvm.org/D122125
Diffstat (limited to 'clang/lib/CodeGen/CodeGenModule.cpp')
0 files changed, 0 insertions, 0 deletions