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| author | Simon Moll <simon.moll@emea.nec.com> | 2020-11-19 10:58:12 +0100 |
|---|---|---|
| committer | Simon Moll <simon.moll@emea.nec.com> | 2020-11-19 10:58:29 +0100 |
| commit | a1de391dae8b6851c49a54da984c19d556c2b561 (patch) | |
| tree | bce8aaec6238c7b7868b35a70f9cc763bbf17e65 /clang/lib/CodeGen/CodeGenModule.cpp | |
| parent | 2d1f471e45af817e39f50ec88079cbbbf2580842 (diff) | |
| download | llvm-a1de391dae8b6851c49a54da984c19d556c2b561.zip llvm-a1de391dae8b6851c49a54da984c19d556c2b561.tar.gz llvm-a1de391dae8b6851c49a54da984c19d556c2b561.tar.bz2 | |
[LV][NFC-ish] Allow vector widths over 256 elements
The assertion that vector widths are <= 256 elements was hard wired in the LV code. Eg, VE allows for vectors up to 512 elements. Test again the TTI vector register bit width instead - this is an NFC for non-asserting builds.
Reviewed By: fhahn
Differential Revision: https://reviews.llvm.org/D91518
Diffstat (limited to 'clang/lib/CodeGen/CodeGenModule.cpp')
0 files changed, 0 insertions, 0 deletions