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| author | Philip Reames <preames@rivosinc.com> | 2024-02-22 07:54:51 -0800 |
|---|---|---|
| committer | Philip Reames <listmail@philipreames.com> | 2024-02-22 08:11:24 -0800 |
| commit | 9eb5f94f9b47154cf07160a6ba74ab1c31becfa3 (patch) | |
| tree | 0439d87b4041a56f8ec88a5828d9af980f16ab6f /clang/lib/CodeGen/CodeGenModule.cpp | |
| parent | 695a9d84dc1dd003c31d3e5e22af3525c31218c2 (diff) | |
| download | llvm-9eb5f94f9b47154cf07160a6ba74ab1c31becfa3.zip llvm-9eb5f94f9b47154cf07160a6ba74ab1c31becfa3.tar.gz llvm-9eb5f94f9b47154cf07160a6ba74ab1c31becfa3.tar.bz2 | |
[RISCV][AArch64] Add vscale_range attribute to tests per architecture minimums
Spent a bunch of time tracing down an odd issue "in SCEV" which turned out
to be the fact that SCEV doesn't have access to TTI. As a result, the only
way for it to get range facts on vscales (to avoid collapsing ranges of
element counts and type sizes to trivial ranges on multiplies) is to look
at the vscale_range attribute. Since vscale_range is set by clang by
default, manually setting it in the tests shouldn't interfere with the
test intent.
Diffstat (limited to 'clang/lib/CodeGen/CodeGenModule.cpp')
0 files changed, 0 insertions, 0 deletions