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authorRolandF77 <55763885+RolandF77@users.noreply.github.com>2025-05-13 11:26:46 -0400
committerGitHub <noreply@github.com>2025-05-13 11:26:46 -0400
commit99f03096697625d14a536c5ac764ca530daa4008 (patch)
tree8ba3cdbf3793e32417d9a01c94207539817ef713 /clang/lib/CodeGen/CodeGenModule.cpp
parent7e8b3fea43f1dfa1d5611a70d887cba5d79b2da9 (diff)
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[PowerPC] catch v2i64 shift left by 1 is add case (#138772)
Catch missing case in PPC BE for v2i64 x << 1 and generate x + x.
Diffstat (limited to 'clang/lib/CodeGen/CodeGenModule.cpp')
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