diff options
| author | Pravin Jagtap <Pravin.Jagtap@amd.com> | 2025-02-21 07:27:25 +0530 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-02-21 07:27:25 +0530 |
| commit | 7c2ebe5dbb4d5cfae7670036394a6f23dcbe4bf7 (patch) | |
| tree | f4afebd10444f6b60393382c843561bf55f05457 /clang/lib/CodeGen/CodeGenModule.cpp | |
| parent | 776cddacb1ab8fd92bcb3aa42f9c0b348d8aa2ba (diff) | |
| download | llvm-7c2ebe5dbb4d5cfae7670036394a6f23dcbe4bf7.zip llvm-7c2ebe5dbb4d5cfae7670036394a6f23dcbe4bf7.tar.gz llvm-7c2ebe5dbb4d5cfae7670036394a6f23dcbe4bf7.tar.bz2 | |
AMDGPU: Restrict src0 to VGPRs only for certain cvt scale opcodes. (#127464)
The Src0 operand width higher that 32-bits of cvt_scale opcodes
operating on FP6/BF6/FP4 need to be restricted to take only VGPRs.
Diffstat (limited to 'clang/lib/CodeGen/CodeGenModule.cpp')
0 files changed, 0 insertions, 0 deletions