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author | WÁNG Xuěruì <git@xen0n.name> | 2024-11-19 20:59:54 +0800 |
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committer | GitHub <noreply@github.com> | 2024-11-19 20:59:54 +0800 |
commit | 75a04c656061fb72c9259c4ae5fb8e41c396dd65 (patch) | |
tree | 633d1fea72f03ec937257530dbf34f85cc19ac47 /clang/lib/CodeGen/CodeGenModule.cpp | |
parent | 4f0403fe96c0e93a1e75cbca6077c46ea3a5aad8 (diff) | |
download | llvm-75a04c656061fb72c9259c4ae5fb8e41c396dd65.zip llvm-75a04c656061fb72c9259c4ae5fb8e41c396dd65.tar.gz llvm-75a04c656061fb72c9259c4ae5fb8e41c396dd65.tar.bz2 |
[LoongArch][NFC] Fix the operand constraint of AMCAS instructions (#114508)
The `rd` operand of AMCAS instructions is both read and written, because
of the nature of compare-and-swap operations, but currently it is not
declared as such. Fix it for upcoming codegen enablement changes. In
order to do that, a piece of LoongArchAsmParser logic that relied on
TableGen-erated enum variants being ordered in a specific way needs
updating; this will be addressed in a following refactor. No functional
change intended.
While at it, restore vertical alignment for the definition lines.
Suggested-by: tangaac <tangyan01@loongson.cn>
Link:
https://github.com/llvm/llvm-project/pull/114398#discussion_r1825362676
Diffstat (limited to 'clang/lib/CodeGen/CodeGenModule.cpp')
0 files changed, 0 insertions, 0 deletions