diff options
| author | c8ef <c8ef@outlook.com> | 2024-06-14 17:44:29 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-06-14 10:44:29 +0100 |
| commit | 4f54b91842ea2ab9546459869df442f7e7fe59d6 (patch) | |
| tree | 0e309c4893b720b7d176daf589c7b3b44e191973 /clang/lib/CodeGen/CodeGenModule.cpp | |
| parent | 44df1167f88cabbb4cfde816f279337379ea30b3 (diff) | |
| download | llvm-4f54b91842ea2ab9546459869df442f7e7fe59d6.zip llvm-4f54b91842ea2ab9546459869df442f7e7fe59d6.tar.gz llvm-4f54b91842ea2ab9546459869df442f7e7fe59d6.tar.bz2 | |
[SDPatternMatch] Only match ISD::SIGN_EXTEND in m_SExt (#95415)
Context: https://github.com/llvm/llvm-project/pull/95365#discussion_r1638236603
The current implementation of `m_SExt` matches both `ISD::SIGN_EXTEND` and `ISD::SIGN_EXTEND_INREG`. However, in cases where we specifically need to match _only_ `ISD::SIGN_EXTEND`, such as in the SelectionDAG graph below, this can lead to issues and unintended combinations.
```
SelectionDAG has 13 nodes:
t0: ch,glue = EntryToken
t2: v2i32,ch = CopyFromReg t0, Register:v2i32 %0
t21: v2i32 = sign_extend_inreg t2, ValueType:ch:v2i8
t4: v2i32,ch = CopyFromReg t0, Register:v2i32 %1
t22: v2i32 = sign_extend_inreg t4, ValueType:ch:v2i8
t23: v2i32 = avgfloors t21, t22
t24: v2i32 = sign_extend_inreg t23, ValueType:ch:v2i8
t15: ch,glue = CopyToReg t0, Register:v2i32 $d0, t24
t16: ch = AArch64ISD::RET_GLUE t15, Register:v2i32 $d0, t15:1
```
Diffstat (limited to 'clang/lib/CodeGen/CodeGenModule.cpp')
0 files changed, 0 insertions, 0 deletions