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| author | Lucas Prates <lucas.prates@arm.com> | 2020-11-12 09:50:58 +0000 |
|---|---|---|
| committer | Lucas Prates <lucas.prates@arm.com> | 2020-12-17 13:45:08 +0000 |
| commit | 42b92b31b8b8ee9fdcd68adfe57db11561a5edcd (patch) | |
| tree | 84fe00067b7d1623a5f3aee7ad037b94abb7f2f4 /clang/lib/CodeGen/CodeGenModule.cpp | |
| parent | 83ea17fc5f742abb0ab0757ef9e667a4e2b39ea8 (diff) | |
| download | llvm-42b92b31b8b8ee9fdcd68adfe57db11561a5edcd.zip llvm-42b92b31b8b8ee9fdcd68adfe57db11561a5edcd.tar.gz llvm-42b92b31b8b8ee9fdcd68adfe57db11561a5edcd.tar.bz2 | |
[ARM][AArch64] Adding basic support for the v8.7-A architecture
This introduces support for the v8.7-A architecture through a new
subtarget feature called "v8.7a". It adds two new "WFET" and "WFIT"
instructions, the nXS limited-TLB-maintenance qualifier for DSB and TLBI
instructions, a new CPU id register, ID_AA64ISAR2_EL1, and the new
HCRX_EL2 system register.
Based on patches written by Simon Tatham and Victor Campos.
Reviewed By: ostannard
Differential Revision: https://reviews.llvm.org/D91772
Diffstat (limited to 'clang/lib/CodeGen/CodeGenModule.cpp')
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