diff options
| author | Ryotaro KASUGA <kasuga.ryotaro@fujitsu.com> | 2024-08-06 13:46:10 +0900 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-08-06 13:46:10 +0900 |
| commit | 1745c8e08dde9f32d0f0b701d3a6a271697458eb (patch) | |
| tree | b4f6630b890a933172e3957ae35cff12b8bb6c03 /clang/lib/CodeGen/CodeGenModule.cpp | |
| parent | 421c3fe54b56608bc6b23716d1cac96c8b3c38c5 (diff) | |
| download | llvm-1745c8e08dde9f32d0f0b701d3a6a271697458eb.zip llvm-1745c8e08dde9f32d0f0b701d3a6a271697458eb.tar.gz llvm-1745c8e08dde9f32d0f0b701d3a6a271697458eb.tar.bz2 | |
[MachinePipeliner] Fix instruction order with physical register (#99264)
dependencies in same cycle
Dependency checks were insufficient when reordering instructions with
physical register dependencies (i.e. Anti/Output dependencies). This
could result in generating incorrect code.
Diffstat (limited to 'clang/lib/CodeGen/CodeGenModule.cpp')
0 files changed, 0 insertions, 0 deletions