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| author | Alex MacLean <amaclean@nvidia.com> | 2024-08-09 11:46:37 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-08-09 11:46:37 -0700 |
| commit | ccc31278bd01d6728c48f1b1f11c56e7a092bb47 (patch) | |
| tree | 955ab00e3d3531dd758461dd3fb29979f275ab10 /clang/lib/CodeGen/CodeGenFunction.cpp | |
| parent | b6cbd014b9770b4cc4630032777f2e6071afc3e0 (diff) | |
| download | llvm-ccc31278bd01d6728c48f1b1f11c56e7a092bb47.zip llvm-ccc31278bd01d6728c48f1b1f11c56e7a092bb47.tar.gz llvm-ccc31278bd01d6728c48f1b1f11c56e7a092bb47.tar.bz2 | |
[NVPTX] support switch statement with brx.idx (reland) (#102550)
Add custom lowering for `BR_JT` DAG nodes to the `brx.idx` PTX
instruction ([PTX ISA 9.7.13.4. Control Flow Instructions: brx.idx]
(https://docs.nvidia.com/cuda/parallel-thread-execution/#control-flow-instructions-brx-idx)).
Depending on the heuristics in DAG selection, `switch` statements may
now be lowered using `brx.idx`.
Note: this fixes the previous issue in #102400 by adding the isBarrier
attribute to BRX_END
Diffstat (limited to 'clang/lib/CodeGen/CodeGenFunction.cpp')
0 files changed, 0 insertions, 0 deletions