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| author | Harrison Hao <57025411+harrisonGPU@users.noreply.github.com> | 2025-06-05 22:07:06 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-06-05 22:07:06 +0800 |
| commit | b2379bd5d59993c0d859ad90f9f5cdfcfce26e71 (patch) | |
| tree | cb64510d58800e13adc80b3719d14c9d273679b0 /clang/lib/CodeGen/CodeGenFunction.cpp | |
| parent | 2d7f53bc27c345b844013b0a64040119bd362e51 (diff) | |
| download | llvm-b2379bd5d59993c0d859ad90f9f5cdfcfce26e71.zip llvm-b2379bd5d59993c0d859ad90f9f5cdfcfce26e71.tar.gz llvm-b2379bd5d59993c0d859ad90f9f5cdfcfce26e71.tar.bz2 | |
[AMDGPU] Support bottom-up postRA scheduing. (#135295)
Solely relying on top‑down scheduling can underutilize hardware, since
long‑latency instructions often end up scheduled too late and their
latency isn’t well hidden. Adding bottom‑up post‑RA scheduling lets us
move those instructions earlier, which improves latency hiding and
yields roughly a 2% performance gain on key benchmarks.
Diffstat (limited to 'clang/lib/CodeGen/CodeGenFunction.cpp')
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