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author | Amy Kwan <amy.kwan1@ibm.com> | 2020-06-25 18:04:00 -0500 |
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committer | Amy Kwan <amy.kwan1@ibm.com> | 2020-06-25 21:34:41 -0500 |
commit | e0c02dc9800ebd317d1369848f4e74c8f783533a (patch) | |
tree | 41fca359e7f8acb3f1bb5bb2b79ee712aed8ba27 /clang/lib/Basic | |
parent | 0723b1891fac8f79f92549e3bcac9112be4ebd43 (diff) | |
download | llvm-e0c02dc9800ebd317d1369848f4e74c8f783533a.zip llvm-e0c02dc9800ebd317d1369848f4e74c8f783533a.tar.gz llvm-e0c02dc9800ebd317d1369848f4e74c8f783533a.tar.bz2 |
[PowerPC][Power10] Implement centrifuge, vector gather every nth bit, vector evaluate Builtins in LLVM/Clang
This patch implements builtins for the following prototypes:
unsigned long long __builtin_cfuged (unsigned long long, unsigned long long);
vector unsigned long long vec_cfuge (vector unsigned long long, vector unsigned long long);
unsigned long long vec_gnb (vector unsigned __int128, const unsigned int);
vector unsigned char vec_ternarylogic (vector unsigned char, vector unsigned char, vector unsigned char, const unsigned int);
vector unsigned short vec_ternarylogic (vector unsigned short, vector unsigned short, vector unsigned short, const unsigned int);
vector unsigned int vec_ternarylogic (vector unsigned int, vector unsigned int, vector unsigned int, const unsigned int);
vector unsigned long long vec_ternarylogic (vector unsigned long long, vector unsigned long long, vector unsigned long long, const unsigned int);
vector unsigned __int128 vec_ternarylogic (vector unsigned __int128, vector unsigned __int128, vector unsigned __int128, const unsigned int);
Differential Revision: https://reviews.llvm.org/D80970
Diffstat (limited to 'clang/lib/Basic')
0 files changed, 0 insertions, 0 deletions