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author | Shengchen Kan <shengchen.kan@intel.com> | 2024-03-01 15:53:06 +0800 |
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committer | Shengchen Kan <shengchen.kan@intel.com> | 2024-03-01 16:13:09 +0800 |
commit | 420928b2fa8b00f23f0adcb19328014592455698 (patch) | |
tree | 406535e177a36c11cf2489141b177f1586d22274 /clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp | |
parent | 6c39fa9e9f198498ff7cf9646081437a0fc0882a (diff) | |
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[X86][CodeGen] Fix compile crash in EVEX compression for corner case
The base register of OPmi_ND may be allocated to the same physic
register as the ND operand.
OPmi_ND is not compressible b/c it has different semnatic from OPmi.
In this case, `isRedundantNewDataDest` should return false, otherwise
we would get error
Assertion `!IsNDLike && "Missing entry for ND-like instruction"' failed.
Diffstat (limited to 'clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp')
0 files changed, 0 insertions, 0 deletions