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author | Guray Ozen <guray.ozen@gmail.com> | 2024-02-13 09:50:34 +0100 |
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committer | GitHub <noreply@github.com> | 2024-02-13 09:50:34 +0100 |
commit | 0a600c34c8c1fe87c9661b6020e5044b24da3dc7 (patch) | |
tree | c17db2b168026611bed5494a230c4cd337b8eaaa /clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp | |
parent | 05ad0d46325732e2f7759cb93c94f3e15b41d110 (diff) | |
download | llvm-0a600c34c8c1fe87c9661b6020e5044b24da3dc7.zip llvm-0a600c34c8c1fe87c9661b6020e5044b24da3dc7.tar.gz llvm-0a600c34c8c1fe87c9661b6020e5044b24da3dc7.tar.bz2 |
[mlir][nvgpu] Make `phaseParity` of `mbarrier.try_wait` `i1` (#81460)
Currently, `phaseParity` argument of `nvgpu.mbarrier.try_wait.parity` is
index. This can cause a problem if it's passed any value different than
0 or 1. Because the PTX instruction only accepts even or odd phase. This
PR makes phaseParity argument i1 to avoid misuse.
Here is the information from PTX doc:
```
The .parity variant of the instructions test for the completion of the phase indicated
by the operand phaseParity, which is the integer parity of either the current phase or
the immediately preceding phase of the mbarrier object. An even phase has integer
parity 0 and an odd phase has integer parity of 1. So the valid values of phaseParity
operand are 0 and 1.
```
See for more information:
https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#parallel-synchronization-and-communication-instructions-mbarrier-test-wait-mbarrier-try-wait
Diffstat (limited to 'clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp')
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