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| author | zhijian lin <zhijian@ca.ibm.com> | 2025-07-04 10:07:03 -0400 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-07-04 10:07:03 -0400 |
| commit | 45909ec469cea4bc479d5c7d0731dec8e8e91112 (patch) | |
| tree | 00e8a416084ba5f0307f8fc6105982520ca062d6 /clang/lib/AST/ByteCode/Compiler.cpp | |
| parent | e5cd9bdfea90def36df4f48186a4434306e50a00 (diff) | |
| download | llvm-45909ec469cea4bc479d5c7d0731dec8e8e91112.zip llvm-45909ec469cea4bc479d5c7d0731dec8e8e91112.tar.gz llvm-45909ec469cea4bc479d5c7d0731dec8e8e91112.tar.bz2 | |
[PowePC] using MTVSRBMI instruction instead of constant pool in power10+ (#144084)
The instruction MTVSRBMI set 0x00(or 0xFF) to each byte of VSR based on
the bits mask. Using the instruction instead of constant pool can reduce
the asm code size and instructions in power10.
Diffstat (limited to 'clang/lib/AST/ByteCode/Compiler.cpp')
0 files changed, 0 insertions, 0 deletions