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authorCraig Topper <craig.topper@sifive.com>2022-12-07 10:03:51 -0800
committerCraig Topper <craig.topper@sifive.com>2022-12-07 10:19:58 -0800
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[RISCV] Remove pseudos for whole register load, store, and move.
The MC layer instructions have the correct register classes, and the pseudos don't have any additional operands. So there doesn't seem to be any reason for them to exist. The pseudos were incorrectly going through code in RISCVMCInstLower that converted LMUL>1 register classes to LMUL1 register class. This makes the MCInst technically malformed, and prevented the vl2r.v, vl4r.v, and vl8r.v InstAliases from matching. This accounts for all of the .ll test diffs. Differential Revision: https://reviews.llvm.org/D139511
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