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author | czhengsz <czhengsz@cn.ibm.com> | 2019-12-18 21:03:54 -0500 |
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committer | czhengsz <czhengsz@cn.ibm.com> | 2019-12-18 21:06:57 -0500 |
commit | f5440ec41d8ef9985b65c1cc66b747529ce86a40 (patch) | |
tree | d734442a9b7c7d09a9b505f21c642faa3d1324aa | |
parent | b40822fc140dcc1544f22bd5312335254d8eda28 (diff) | |
download | llvm-f5440ec41d8ef9985b65c1cc66b747529ce86a40.zip llvm-f5440ec41d8ef9985b65c1cc66b747529ce86a40.tar.gz llvm-f5440ec41d8ef9985b65c1cc66b747529ce86a40.tar.bz2 |
[PowerPC] make lwa as a valid ds candidate in ppcloopinstrformprep pass
Fix a FIXME in ppcloopinstrformprep pass.
Reviewed by: nemanjai
Differential Revision: https://reviews.llvm.org/D71346
-rw-r--r-- | llvm/lib/Target/PowerPC/PPCLoopInstrFormPrep.cpp | 14 | ||||
-rw-r--r-- | llvm/test/CodeGen/PowerPC/loop-instr-form-prepare.ll | 24 |
2 files changed, 20 insertions, 18 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCLoopInstrFormPrep.cpp b/llvm/lib/Target/PowerPC/PPCLoopInstrFormPrep.cpp index 086db4e..467a119 100644 --- a/llvm/lib/Target/PowerPC/PPCLoopInstrFormPrep.cpp +++ b/llvm/lib/Target/PowerPC/PPCLoopInstrFormPrep.cpp @@ -846,11 +846,15 @@ bool PPCLoopInstrFormPrep::runOnLoop(Loop *L) { // Check if a load/store has DS form. auto isDSFormCandidate = [] (const Instruction *I, const Value *PtrValue) { assert((PtrValue && I) && "Invalid parameter!"); - // FIXME: 32 bit instruction lwa is also DS form. - return !isa<IntrinsicInst>(I) && - ((PtrValue->getType()->getPointerElementType()->isIntegerTy(64)) || - (PtrValue->getType()->getPointerElementType()->isFloatTy()) || - (PtrValue->getType()->getPointerElementType()->isDoubleTy())); + if (isa<IntrinsicInst>(I)) + return false; + Type *PointerElementType = PtrValue->getType()->getPointerElementType(); + return (PointerElementType->isIntegerTy(64)) || + (PointerElementType->isFloatTy()) || + (PointerElementType->isDoubleTy()) || + (PointerElementType->isIntegerTy(32) && + llvm::any_of(I->users(), + [](const User *U) { return isa<SExtInst>(U); })); }; // Check if a load/store has DQ form. diff --git a/llvm/test/CodeGen/PowerPC/loop-instr-form-prepare.ll b/llvm/test/CodeGen/PowerPC/loop-instr-form-prepare.ll index 297e301..42a2c78 100644 --- a/llvm/test/CodeGen/PowerPC/loop-instr-form-prepare.ll +++ b/llvm/test/CodeGen/PowerPC/loop-instr-form-prepare.ll @@ -774,20 +774,17 @@ define float @test_ds_combine_float_int(i8* %0, i32 signext %1) { define i64 @test_ds_lwa_prep(i8* %0, i32 signext %1) { ; CHECK-LABEL: test_ds_lwa_prep: -; CHECK: li r6, 1 -; CHECK-NEXT: li r7, 2 -; CHECK-NEXT: li r8, 6 -; CHECK-NEXT: li r9, 10 +; CHECK: addi r5, r3, 2 +; CHECK: li r6, -1 ; CHECK: .LBB9_2: # -; CHECK-NEXT: lwax r11, r3, r6 -; CHECK-NEXT: lwax r12, r3, r7 -; CHECK-NEXT: lwax r0, r3, r8 -; CHECK-NEXT: addi r10, r3, 1 -; CHECK-NEXT: mulld r11, r12, r11 -; CHECK-NEXT: lwax r3, r3, r9 -; CHECK-NEXT: mulld r11, r11, r0 -; CHECK-NEXT: maddld r5, r11, r3, r5 -; CHECK-NEXT: mr r3, r10 +; CHECK-NEXT: lwax r7, r5, r6 +; CHECK-NEXT: lwa r8, 0(r5) +; CHECK-NEXT: lwa r9, 4(r5) +; CHECK-NEXT: lwa r10, 8(r5) +; CHECK-NEXT: addi r5, r5, 1 +; CHECK-NEXT: mulld r7, r8, r7 +; CHECK-NEXT: mulld r7, r7, r9 +; CHECK-NEXT: maddld r3, r7, r10, r3 ; CHECK-NEXT: bdnz .LBB9_2 %3 = sext i32 %1 to i64 @@ -827,3 +824,4 @@ define i64 @test_ds_lwa_prep(i8* %0, i32 signext %1) { %33 = add nsw i64 %32, %3 ret i64 %33 } + |