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author | Fangrui Song <i@maskray.me> | 2025-06-15 14:51:20 -0700 |
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committer | Fangrui Song <i@maskray.me> | 2025-06-15 14:51:20 -0700 |
commit | f4a63523b88631e224496435bea0940ac05897bf (patch) | |
tree | d108282e33871b07fa2bf26c34a61621a10757a5 | |
parent | 790df93298b3ad6c57dafb55fc6d18bddff16c4a (diff) | |
download | llvm-f4a63523b88631e224496435bea0940ac05897bf.zip llvm-f4a63523b88631e224496435bea0940ac05897bf.tar.gz llvm-f4a63523b88631e224496435bea0940ac05897bf.tar.bz2 |
PowerPC: Migrate to newer relocation specifier representation
* Use MCAsmInfo::printSpecifierExpr instead of MCExpr::print.
* Replace PPCMCExpr with MCSpecifierExpr.
-rw-r--r-- | llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp | 10 | ||||
-rw-r--r-- | llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp | 24 | ||||
-rw-r--r-- | llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h | 8 | ||||
-rw-r--r-- | llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp | 60 | ||||
-rw-r--r-- | llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h | 31 | ||||
-rw-r--r-- | llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 16 | ||||
-rw-r--r-- | llvm/lib/Target/PowerPC/PPCMCInstLower.cpp | 4 |
7 files changed, 78 insertions, 75 deletions
diff --git a/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp b/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp index 7e79d85..bb4c2fd 100644 --- a/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp +++ b/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp @@ -749,9 +749,9 @@ public: getSpecifier(SRE) == PPC::S_TLS_PCREL) return CreateTLSReg(SRE, S, E, IsPPC64); - if (const PPCMCExpr *TE = dyn_cast<PPCMCExpr>(Val)) { + if (const auto *SE = dyn_cast<MCSpecifierExpr>(Val)) { int64_t Res; - if (TE->evaluateAsConstant(Res)) + if (PPC::evaluateAsConstant(*SE, Res)) return CreateContextImm(Res, S, E, IsPPC64); } @@ -1375,7 +1375,7 @@ const MCExpr *PPCAsmParser::extractSpecifier(const MCExpr *E, break; case MCExpr::Specifier: { // Detect error but do not return a modified expression. - auto *TE = cast<PPCMCExpr>(E); + auto *TE = cast<MCSpecifierExpr>(E); Spec = TE->getSpecifier(); (void)extractSpecifier(TE->getSubExpr(), Spec); Spec = PPC::S_None; @@ -1439,7 +1439,7 @@ bool PPCAsmParser::parseExpression(const MCExpr *&EVal) { uint16_t Spec = PPC::S_None; const MCExpr *E = extractSpecifier(EVal, Spec); if (Spec != PPC::S_None) - EVal = PPCMCExpr::create(Spec, E, getParser().getContext()); + EVal = MCSpecifierExpr::create(E, Spec, getParser().getContext()); return false; } @@ -1841,5 +1841,5 @@ const MCExpr *PPCAsmParser::applySpecifier(const MCExpr *E, uint32_t Spec, } } - return PPCMCExpr::create(PPCMCExpr::Specifier(Spec), E, Ctx); + return MCSpecifierExpr::create(E, Spec, Ctx); } diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp index bb1f21d..971b592 100644 --- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp +++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp @@ -13,6 +13,7 @@ #include "PPCMCAsmInfo.h" #include "PPCMCExpr.h" #include "llvm/MC/MCExpr.h" +#include "llvm/Support/raw_ostream.h" #include "llvm/TargetParser/Triple.h" using namespace llvm; @@ -136,6 +137,18 @@ PPCELFMCAsmInfo::PPCELFMCAsmInfo(bool is64Bit, const Triple& T) { initializeVariantKinds(variantKindDescs); } +void PPCELFMCAsmInfo::printSpecifierExpr(raw_ostream &OS, + const MCSpecifierExpr &Expr) const { + printExpr(OS, *Expr.getSubExpr()); + OS << '@' << getSpecifierName(Expr.getSpecifier()); +} + +bool PPCELFMCAsmInfo::evaluateAsRelocatableImpl(const MCSpecifierExpr &Expr, + MCValue &Res, + const MCAssembler *Asm) const { + return PPC::evaluateAsRelocatableImpl(Expr, Res, Asm); +} + void PPCXCOFFMCAsmInfo::anchor() {} PPCXCOFFMCAsmInfo::PPCXCOFFMCAsmInfo(bool Is64Bit, const Triple &T) { @@ -159,3 +172,14 @@ PPCXCOFFMCAsmInfo::PPCXCOFFMCAsmInfo(bool Is64Bit, const Triple &T) { initializeVariantKinds(variantKindDescs); } + +void PPCXCOFFMCAsmInfo::printSpecifierExpr(raw_ostream &OS, + const MCSpecifierExpr &Expr) const { + printExpr(OS, *Expr.getSubExpr()); + OS << '@' << getSpecifierName(Expr.getSpecifier()); +} + +bool PPCXCOFFMCAsmInfo::evaluateAsRelocatableImpl( + const MCSpecifierExpr &Expr, MCValue &Res, const MCAssembler *Asm) const { + return PPC::evaluateAsRelocatableImpl(Expr, Res, Asm); +} diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h index 9fbb73c..172fe81 100644 --- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h +++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h @@ -24,6 +24,10 @@ class PPCELFMCAsmInfo : public MCAsmInfoELF { public: explicit PPCELFMCAsmInfo(bool is64Bit, const Triple &); + void printSpecifierExpr(raw_ostream &OS, + const MCSpecifierExpr &Expr) const override; + bool evaluateAsRelocatableImpl(const MCSpecifierExpr &Expr, MCValue &Res, + const MCAssembler *Asm) const override; }; class PPCXCOFFMCAsmInfo : public MCAsmInfoXCOFF { @@ -31,6 +35,10 @@ class PPCXCOFFMCAsmInfo : public MCAsmInfoXCOFF { public: explicit PPCXCOFFMCAsmInfo(bool is64Bit, const Triple &); + void printSpecifierExpr(raw_ostream &OS, + const MCSpecifierExpr &Expr) const override; + bool evaluateAsRelocatableImpl(const MCSpecifierExpr &Expr, MCValue &Res, + const MCAssembler *Asm) const override; }; namespace PPC { diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp index 49ae6bb..8d9c089 100644 --- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp +++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp @@ -16,38 +16,8 @@ using namespace llvm; #define DEBUG_TYPE "ppcmcexpr" -const PPCMCExpr *PPCMCExpr::create(Specifier S, const MCExpr *Expr, - MCContext &Ctx) { - return new (Ctx) PPCMCExpr(S, Expr); -} - -const PPCMCExpr *PPCMCExpr::create(const MCExpr *Expr, Specifier S, - MCContext &Ctx) { - return new (Ctx) PPCMCExpr(S, Expr); -} - -void PPCMCExpr::printImpl(raw_ostream &OS, const MCAsmInfo *MAI) const { - getSubExpr()->print(OS, MAI); - OS << '@' << MAI->getSpecifierName(specifier); -} - -bool -PPCMCExpr::evaluateAsConstant(int64_t &Res) const { - MCValue Value; - - if (!getSubExpr()->evaluateAsRelocatable(Value, nullptr)) - return false; - - if (!Value.isAbsolute()) - return false; - auto Tmp = evaluateAsInt64(Value.getConstant()); - if (!Tmp) - return false; - Res = *Tmp; - return true; -} - -std::optional<int64_t> PPCMCExpr::evaluateAsInt64(int64_t Value) const { +static std::optional<int64_t> evaluateAsInt64(uint16_t specifier, + int64_t Value) { switch (specifier) { case PPC::S_LO: return Value & 0xffff; @@ -72,21 +42,35 @@ std::optional<int64_t> PPCMCExpr::evaluateAsInt64(int64_t Value) const { } } -bool PPCMCExpr::evaluateAsRelocatableImpl(MCValue &Res, - const MCAssembler *Asm) const { - if (!Asm) +bool PPC::evaluateAsConstant(const MCSpecifierExpr &Expr, int64_t &Res) { + MCValue Value; + + if (!Expr.getSubExpr()->evaluateAsRelocatable(Value, nullptr)) + return false; + + if (!Value.isAbsolute()) + return false; + auto Tmp = evaluateAsInt64(Expr.getSpecifier(), Value.getConstant()); + if (!Tmp) return false; - if (!getSubExpr()->evaluateAsRelocatable(Res, Asm)) + Res = *Tmp; + return true; +} + +bool PPC::evaluateAsRelocatableImpl(const MCSpecifierExpr &Expr, MCValue &Res, + const MCAssembler *Asm) { + if (!Expr.getSubExpr()->evaluateAsRelocatable(Res, Asm)) return false; // The signedness of the result is dependent on the instruction operand. E.g. // in addis 3,3,65535@l, 65535@l is signed. In the absence of information at // parse time (!Asm), disable the folding. - std::optional<int64_t> MaybeInt = evaluateAsInt64(Res.getConstant()); + std::optional<int64_t> MaybeInt = + evaluateAsInt64(Expr.getSpecifier(), Res.getConstant()); if (Res.isAbsolute() && MaybeInt) { Res = MCValue::get(*MaybeInt); } else { - Res.setSpecifier(specifier); + Res.setSpecifier(Expr.getSpecifier()); } return true; diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h index 814217e..d97a1204 100644 --- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h +++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h @@ -16,33 +16,20 @@ namespace llvm { -class PPCMCExpr : public MCSpecifierExpr { -public: - using Specifier = uint16_t; - -private: - std::optional<int64_t> evaluateAsInt64(int64_t Value) const; - - explicit PPCMCExpr(Specifier S, const MCExpr *Expr) - : MCSpecifierExpr(Expr, S) {} - -public: - static const PPCMCExpr *create(Specifier S, const MCExpr *Expr, - MCContext &Ctx); - static const PPCMCExpr *create(const MCExpr *Expr, Specifier S, - MCContext &Ctx); - - void printImpl(raw_ostream &OS, const MCAsmInfo *MAI) const override; - bool evaluateAsRelocatableImpl(MCValue &Res, - const MCAssembler *Asm) const override; - - bool evaluateAsConstant(int64_t &Res) const; -}; +namespace PPCMCExpr { +using Specifier = uint16_t; +} static inline PPCMCExpr::Specifier getSpecifier(const MCSymbolRefExpr *SRE) { return PPCMCExpr::Specifier(SRE->getKind()); } +namespace PPC { +bool evaluateAsConstant(const MCSpecifierExpr &Expr, int64_t &Res); +bool evaluateAsRelocatableImpl(const MCSpecifierExpr &Expr, MCValue &Res, + const MCAssembler *Asm); +} // namespace PPC + } // end namespace llvm #endif diff --git a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp index 8a1357c..d5d51e3 100644 --- a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp +++ b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp @@ -1001,13 +1001,13 @@ void PPCAsmPrinter::emitInstruction(const MachineInstr *MI) { MCSymbolRefExpr::create(BaseSymbol, OutContext), PB, OutContext); const MCExpr *DeltaHi = - PPCMCExpr::create(DeltaExpr, PPC::S_HA, OutContext); + MCSpecifierExpr::create(DeltaExpr, PPC::S_HA, OutContext); EmitToStreamer( *OutStreamer, MCInstBuilder(PPC::ADDIS).addReg(PICR).addReg(PICR).addExpr(DeltaHi)); const MCExpr *DeltaLo = - PPCMCExpr::create(DeltaExpr, PPC::S_LO, OutContext); + MCSpecifierExpr::create(DeltaExpr, PPC::S_LO, OutContext); EmitToStreamer( *OutStreamer, MCInstBuilder(PPC::ADDI).addReg(PICR).addReg(PICR).addExpr(DeltaLo)); @@ -1401,10 +1401,10 @@ void PPCAsmPrinter::emitInstruction(const MachineInstr *MI) { case PPC::PPC32GOT: { MCSymbol *GOTSymbol = OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); - const MCExpr *SymGotTlsL = PPCMCExpr::create( - PPC::S_LO, MCSymbolRefExpr::create(GOTSymbol, OutContext), OutContext); - const MCExpr *SymGotTlsHA = PPCMCExpr::create( - PPC::S_HA, MCSymbolRefExpr::create(GOTSymbol, OutContext), OutContext); + const MCExpr *SymGotTlsL = + MCSpecifierExpr::create(GOTSymbol, PPC::S_LO, OutContext); + const MCExpr *SymGotTlsHA = + MCSpecifierExpr::create(GOTSymbol, PPC::S_HA, OutContext); EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI) .addReg(MI->getOperand(0).getReg()) .addExpr(SymGotTlsL)); @@ -2125,14 +2125,14 @@ void PPCLinuxAsmPrinter::emitFunctionBodyStart() { GlobalEntryLabelExp, OutContext); const MCExpr *TOCDeltaHi = - PPCMCExpr::create(TOCDeltaExpr, PPC::S_HA, OutContext); + MCSpecifierExpr::create(TOCDeltaExpr, PPC::S_HA, OutContext); EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) .addReg(PPC::X2) .addReg(PPC::X12) .addExpr(TOCDeltaHi)); const MCExpr *TOCDeltaLo = - PPCMCExpr::create(TOCDeltaExpr, PPC::S_LO, OutContext); + MCSpecifierExpr::create(TOCDeltaExpr, PPC::S_LO, OutContext); EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDI) .addReg(PPC::X2) .addReg(PPC::X2) diff --git a/llvm/lib/Target/PowerPC/PPCMCInstLower.cpp b/llvm/lib/Target/PowerPC/PPCMCInstLower.cpp index f6624ec..cbd53651 100644 --- a/llvm/lib/Target/PowerPC/PPCMCInstLower.cpp +++ b/llvm/lib/Target/PowerPC/PPCMCInstLower.cpp @@ -164,11 +164,11 @@ static MCOperand GetSymbolRef(const MachineOperand &MO, const MCSymbol *Symbol, switch (access) { case PPCII::MO_LO: case PPCII::MO_PIC_LO_FLAG: - Expr = PPCMCExpr::create(Expr, PPC::S_LO, Ctx); + Expr = MCSpecifierExpr::create(Expr, PPC::S_LO, Ctx); break; case PPCII::MO_HA: case PPCII::MO_PIC_HA_FLAG: - Expr = PPCMCExpr::create(Expr, PPC::S_HA, Ctx); + Expr = MCSpecifierExpr::create(Expr, PPC::S_HA, Ctx); break; } |