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| author | Ties Stuij <ties.stuij@arm.com> | 2022-04-07 14:35:30 +0100 |
|---|---|---|
| committer | Ties Stuij <ties.stuij@arm.com> | 2022-04-07 14:53:46 +0100 |
| commit | edeceb8647ff9cd60cbf8d62eb7149e6fb1f81d7 (patch) | |
| tree | 4f11d88865ef489932eeed440b22471c0ae78c7b | |
| parent | 5909c678831f3a5c1669f6906f777d4ec4532fa1 (diff) | |
| download | llvm-edeceb8647ff9cd60cbf8d62eb7149e6fb1f81d7.zip llvm-edeceb8647ff9cd60cbf8d62eb7149e6fb1f81d7.tar.gz llvm-edeceb8647ff9cd60cbf8d62eb7149e6fb1f81d7.tar.bz2 | |
remove dead code in parseRegisterList checking for ARM::RA_AUTH_CODE
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D122577
| -rw-r--r-- | llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index 0accc9e..fdac90c 100644 --- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -4528,9 +4528,7 @@ bool ARMAsmParser::parseRegisterList(OperandVector &Operands, bool EnforceOrder, if (Reg == EndReg) continue; // The register must be in the same register class as the first. - if ((Reg == ARM::RA_AUTH_CODE && - RC != &ARMMCRegisterClasses[ARM::GPRRegClassID]) || - (Reg != ARM::RA_AUTH_CODE && !RC->contains(Reg))) + if (!RC->contains(Reg)) return Error(AfterMinusLoc, "invalid register in register list"); // Ranges must go from low to high. if (MRI->getEncodingValue(Reg) > MRI->getEncodingValue(EndReg)) |