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authorJim Grosbach <grosbach@apple.com>2011-07-22 22:06:05 +0000
committerJim Grosbach <grosbach@apple.com>2011-07-22 22:06:05 +0000
commite7e1e163db5dd9679d68b5b5568767f0c99bf15d (patch)
treef974bc370afe8cc3593f4c99e65ead2238855c0f
parentb1561f1e235328ef1f45c1ea770813b2034987b0 (diff)
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ARM assembly parsing and encoding updates.
Tests for SMULBB, SMLALBT, SMLALTB, SMLALTT, and SMULL. Fix parsing of SMULLS. llvm-svn: 135817
-rw-r--r--llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp2
-rw-r--r--llvm/test/MC/ARM/basic-arm-instructions.s30
2 files changed, 31 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 1455389..4491c50 100644
--- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -2153,7 +2153,7 @@ StringRef ARMAsmParser::SplitMnemonic(StringRef Mnemonic,
// First, split out any predication code. Ignore mnemonics we know aren't
// predicated but do have a carry-set and so weren't caught above.
if (Mnemonic != "adcs" && Mnemonic != "bics" && Mnemonic != "movs" &&
- Mnemonic != "muls" && Mnemonic != "smlals") {
+ Mnemonic != "muls" && Mnemonic != "smlals" && Mnemonic != "smulls") {
unsigned CC = StringSwitch<unsigned>(Mnemonic.substr(Mnemonic.size()-2))
.Case("eq", ARMCC::EQ)
.Case("ne", ARMCC::NE)
diff --git a/llvm/test/MC/ARM/basic-arm-instructions.s b/llvm/test/MC/ARM/basic-arm-instructions.s
index 9019ca3..5d303d3 100644
--- a/llvm/test/MC/ARM/basic-arm-instructions.s
+++ b/llvm/test/MC/ARM/basic-arm-instructions.s
@@ -1550,6 +1550,36 @@ _func:
@ CHECK: smuadlt r2, r3, r4 @ encoding: [0x13,0xf4,0x02,0xb7]
@ CHECK: smuadxge r3, r2, r1 @ encoding: [0x32,0xf1,0x03,0xa7]
+
+@------------------------------------------------------------------------------
+@ SMULBB/SMLALBT/SMLALTB/SMLALTT
+@------------------------------------------------------------------------------
+ smulbb r3, r9, r0
+ smulbt r5, r4, r1
+ smultb r4, r2, r2
+ smultt r8, r3, r4
+ smulbbge r1, r9, r0
+ smulbtle r5, r6, r4
+ smultbne r2, r3, r2
+ smultteq r8, r3, r4
+
+@ CHECK: smulbb r3, r9, r0 @ encoding: [0x89,0x00,0x63,0xe1]
+@ CHECK: smulbt r5, r4, r1 @ encoding: [0xc4,0x01,0x65,0xe1]
+@ CHECK: smultb r4, r2, r2 @ encoding: [0xa2,0x02,0x64,0xe1]
+@ CHECK: smultt r8, r3, r4 @ encoding: [0xe3,0x04,0x68,0xe1]
+@ CHECK: smulbbge r1, r9, r0 @ encoding: [0x89,0x00,0x61,0xa1]
+@ CHECK: smulbtle r5, r6, r4 @ encoding: [0xc6,0x04,0x65,0xd1]
+@ CHECK: smultbne r2, r3, r2 @ encoding: [0xa3,0x02,0x62,0x11]
+@ CHECK: smultteq r8, r3, r4 @ encoding: [0xe3,0x04,0x68,0x01]
+
+@------------------------------------------------------------------------------
+@ SMULL
+@------------------------------------------------------------------------------
+ smull r3, r9, r0, r1
+ smulls r3, r9, r0, r2
+ smulleq r8, r3, r4, r5
+ smullseq r8, r3, r4, r3
+
@------------------------------------------------------------------------------
@ STM*
@------------------------------------------------------------------------------