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author | Craig Topper <craig.topper@intel.com> | 2018-06-13 17:55:13 +0000 |
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committer | Craig Topper <craig.topper@intel.com> | 2018-06-13 17:55:13 +0000 |
commit | e399f55826d830c6d725f91c6c7df265c58ecc6b (patch) | |
tree | 8754a65a2b8ef06b967c77b887631688b6c8c5ab | |
parent | 1d7ed944398913c7c282ba086965b101bf0b0d54 (diff) | |
download | llvm-e399f55826d830c6d725f91c6c7df265c58ecc6b.zip llvm-e399f55826d830c6d725f91c6c7df265c58ecc6b.tar.gz llvm-e399f55826d830c6d725f91c6c7df265c58ecc6b.tar.bz2 |
[X86] Add one more intrinsic and test cases to avx512-cvttp2i.ll.
spatel noticed it was missing in D47993.
llvm-svn: 334629
-rw-r--r-- | llvm/test/CodeGen/X86/avx512-cvttp2i.ll | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/avx512-cvttp2i.ll b/llvm/test/CodeGen/X86/avx512-cvttp2i.ll index 40b1143..3966edd 100644 --- a/llvm/test/CodeGen/X86/avx512-cvttp2i.ll +++ b/llvm/test/CodeGen/X86/avx512-cvttp2i.ll @@ -9,6 +9,7 @@ declare <4 x i32> @llvm.x86.avx512.mask.cvttps2udq.128(<4 x float>, <4 x i32>, i declare <8 x i32> @llvm.x86.avx512.mask.cvttps2udq.256(<8 x float>, <8 x i32>, i8) declare <16 x i32> @llvm.x86.avx512.mask.cvttps2udq.512(<16 x float>, <16 x i32>, i16, i32) declare <4 x i32> @llvm.x86.avx512.mask.cvttpd2udq.256(<4 x double>, <4 x i32>, i8) +declare <8 x i32> @llvm.x86.avx512.mask.cvttpd2dq.512(<8 x double>, <8 x i32>, i8, i32) declare <8 x i32> @llvm.x86.avx512.mask.cvttpd2udq.512(<8 x double>, <8 x i32>, i8, i32) declare <4 x i64> @llvm.x86.avx512.mask.cvttps2qq.256(<4 x float>, <4 x i64>, i8) declare <8 x i64> @llvm.x86.avx512.mask.cvttps2qq.512(<8 x float>, <8 x i64>, i8, i32) @@ -126,6 +127,27 @@ define <4 x double> @double_to_uint_to_double_reg_v4f64(<4 x double> %x) { ret <4 x double> %uitofp } +define <8 x double> @double_to_sint_to_double_mem_v8f64(<8 x double>* %p) { +; CHECK-LABEL: double_to_sint_to_double_mem_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vrndscalepd $11, (%rdi), %zmm0 +; CHECK-NEXT: retq + %x = load <8 x double>, <8 x double>* %p + %fptosi = tail call <8 x i32> @llvm.x86.avx512.mask.cvttpd2dq.512(<8 x double> %x, <8 x i32> undef, i8 -1, i32 4) + %sitofp = sitofp <8 x i32> %fptosi to <8 x double> + ret <8 x double> %sitofp +} + +define <8 x double> @double_to_sint_to_double_reg_v8f64(<8 x double> %x) { +; CHECK-LABEL: double_to_sint_to_double_reg_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vrndscalepd $11, %zmm0, %zmm0 +; CHECK-NEXT: retq + %fptosi = tail call <8 x i32> @llvm.x86.avx512.mask.cvttpd2dq.512(<8 x double> %x, <8 x i32> undef, i8 -1, i32 4) + %sitofp = sitofp <8 x i32> %fptosi to <8 x double> + ret <8 x double> %sitofp +} + define <8 x double> @double_to_uint_to_double_mem_v8f64(<8 x double>* %p) { ; CHECK-LABEL: double_to_uint_to_double_mem_v8f64: ; CHECK: # %bb.0: |