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author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2025-06-13 17:11:18 +0100 |
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committer | GitHub <noreply@github.com> | 2025-06-13 17:11:18 +0100 |
commit | dec576514cb7106c59a5059ac6d52ebdf5de5275 (patch) | |
tree | 7c52e2084641176583ca4156ab2cf23027ac2b32 | |
parent | d688df52ba9012197b3716ae85f818fafee7cf62 (diff) | |
download | llvm-dec576514cb7106c59a5059ac6d52ebdf5de5275.zip llvm-dec576514cb7106c59a5059ac6d52ebdf5de5275.tar.gz llvm-dec576514cb7106c59a5059ac6d52ebdf5de5275.tar.bz2 |
[X86] X86FixupInstTuning - add dbg message for each instruction replacement (#144083)
Help debug the changes the pass makes
-rw-r--r-- | llvm/lib/Target/X86/X86FixupInstTuning.cpp | 57 |
1 files changed, 40 insertions, 17 deletions
diff --git a/llvm/lib/Target/X86/X86FixupInstTuning.cpp b/llvm/lib/Target/X86/X86FixupInstTuning.cpp index 8c1ff52..89093b2 100644 --- a/llvm/lib/Target/X86/X86FixupInstTuning.cpp +++ b/llvm/lib/Target/X86/X86FixupInstTuning.cpp @@ -132,11 +132,15 @@ bool X86FixupInstTuningPass::processInstruction( auto ProcessVPERMILPDri = [&](unsigned NewOpc) -> bool { if (!NewOpcPreferable(NewOpc)) return false; - unsigned MaskImm = MI.getOperand(NumOperands - 1).getImm(); - MI.removeOperand(NumOperands - 1); - MI.addOperand(MI.getOperand(NumOperands - 2)); - MI.setDesc(TII->get(NewOpc)); - MI.addOperand(MachineOperand::CreateImm(MaskImm)); + LLVM_DEBUG(dbgs() << "Replacing: " << MI); + { + unsigned MaskImm = MI.getOperand(NumOperands - 1).getImm(); + MI.removeOperand(NumOperands - 1); + MI.addOperand(MI.getOperand(NumOperands - 2)); + MI.setDesc(TII->get(NewOpc)); + MI.addOperand(MachineOperand::CreateImm(MaskImm)); + } + LLVM_DEBUG(dbgs() << " With: " << MI); return true; }; @@ -147,11 +151,15 @@ bool X86FixupInstTuningPass::processInstruction( auto ProcessVPERMILPSri = [&](unsigned NewOpc) -> bool { if (!NewOpcPreferable(NewOpc)) return false; - unsigned MaskImm = MI.getOperand(NumOperands - 1).getImm(); - MI.removeOperand(NumOperands - 1); - MI.addOperand(MI.getOperand(NumOperands - 2)); - MI.setDesc(TII->get(NewOpc)); - MI.addOperand(MachineOperand::CreateImm(MaskImm)); + LLVM_DEBUG(dbgs() << "Replacing: " << MI); + { + unsigned MaskImm = MI.getOperand(NumOperands - 1).getImm(); + MI.removeOperand(NumOperands - 1); + MI.addOperand(MI.getOperand(NumOperands - 2)); + MI.setDesc(TII->get(NewOpc)); + MI.addOperand(MachineOperand::CreateImm(MaskImm)); + } + LLVM_DEBUG(dbgs() << " With: " << MI); return true; }; @@ -164,7 +172,11 @@ bool X86FixupInstTuningPass::processInstruction( if (!ST->hasNoDomainDelayShuffle() || !NewOpcPreferable(NewOpc, /*ReplaceInTie*/ false)) return false; - MI.setDesc(TII->get(NewOpc)); + LLVM_DEBUG(dbgs() << "Replacing: " << MI); + { + MI.setDesc(TII->get(NewOpc)); + } + LLVM_DEBUG(dbgs() << " With: " << MI); return true; }; @@ -185,9 +197,12 @@ bool X86FixupInstTuningPass::processInstruction( auto ProcessUNPCK = [&](unsigned NewOpc, unsigned MaskImm) -> bool { if (!NewOpcPreferable(NewOpc, /*ReplaceInTie*/ false)) return false; - - MI.setDesc(TII->get(NewOpc)); - MI.addOperand(MachineOperand::CreateImm(MaskImm)); + LLVM_DEBUG(dbgs() << "Replacing: " << MI); + { + MI.setDesc(TII->get(NewOpc)); + MI.addOperand(MachineOperand::CreateImm(MaskImm)); + } + LLVM_DEBUG(dbgs() << " With: " << MI); return true; }; @@ -198,7 +213,11 @@ bool X86FixupInstTuningPass::processInstruction( if (!ST->hasNoDomainDelayShuffle() || !NewOpcPreferable(NewOpc, /*ReplaceInTie*/ false)) return false; - MI.setDesc(TII->get(NewOpc)); + LLVM_DEBUG(dbgs() << "Replacing: " << MI); + { + MI.setDesc(TII->get(NewOpc)); + } + LLVM_DEBUG(dbgs() << " With: " << MI); return true; }; @@ -229,8 +248,12 @@ bool X86FixupInstTuningPass::processInstruction( return false; if (!OptSize && !NewOpcPreferable(MovOpc)) return false; - MI.setDesc(TII->get(MovOpc)); - MI.removeOperand(NumOperands - 1); + LLVM_DEBUG(dbgs() << "Replacing: " << MI); + { + MI.setDesc(TII->get(MovOpc)); + MI.removeOperand(NumOperands - 1); + } + LLVM_DEBUG(dbgs() << " With: " << MI); return true; }; |