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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2020-01-07 13:12:12 -0500 |
|---|---|---|
| committer | Matt Arsenault <arsenm2@gmail.com> | 2020-01-07 15:10:08 -0500 |
| commit | de46ab698bd6a174e33e90207342f2ecece05a06 (patch) | |
| tree | 4942ec812cb60178814fb1558245febefee9e803 | |
| parent | bd8d696c145edba207f7240407ac092b02b68300 (diff) | |
| download | llvm-de46ab698bd6a174e33e90207342f2ecece05a06.zip llvm-de46ab698bd6a174e33e90207342f2ecece05a06.tar.gz llvm-de46ab698bd6a174e33e90207342f2ecece05a06.tar.bz2 | |
AMDGPU: Fix misleading, misplaced end block comments
| -rw-r--r-- | llvm/lib/Target/AMDGPU/VOP2Instructions.td | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/AMDGPU/VOP2Instructions.td b/llvm/lib/Target/AMDGPU/VOP2Instructions.td index 94e737d..87a2cba 100644 --- a/llvm/lib/Target/AMDGPU/VOP2Instructions.td +++ b/llvm/lib/Target/AMDGPU/VOP2Instructions.td @@ -777,7 +777,7 @@ defm : Arithmetic_i16_0Hi_Pats<umax, V_MAX_U16_e64>; defm : Arithmetic_i16_0Hi_Pats<lshl_rev, V_LSHLREV_B16_e64>; defm : Arithmetic_i16_0Hi_Pats<lshr_rev, V_LSHRREV_B16_e64>; defm : Arithmetic_i16_0Hi_Pats<ashr_rev, V_ASHRREV_I16_e64>; -} +} // End Predicates = [Has16BitInsts, isGFX7GFX8GFX9] def : ZExt_i16_i1_Pat<zext>; def : ZExt_i16_i1_Pat<anyext>; @@ -796,7 +796,7 @@ def : GCNPat< (V_SUB_U16_e64 $src0, NegSubInlineConst16:$src1) >; -} // End Predicates = [Has16BitInsts, isGFX7GFX8GFX9] +} // End Predicates = [Has16BitInsts] //===----------------------------------------------------------------------===// |