[test] Change llc -march= to -mtriple=

Similar to 806761a7629df268c8aed49657aeccffa6bca449

-march= is error-prone when running on a host whose OS is different.

9 files changed, 8 insertions, 12 deletions

diff --git a/llvm/test/Analysis/CostModel/X86/scalarize.ll b/llvm/test/Analysis/CostModel/X86/scalarize.ll
index 8f118bf..737272f 100644
--- a/llvm/test/Analysis/CostModel/X86/scalarize.ll
+++ b/llvm/test/Analysis/CostModel/X86/scalarize.ll
@@ -1,10 +1,6 @@
 ; RUN: opt < %s  -passes="print<cost-model>" 2>&1 -disable-output -mtriple=i386 -mcpu=corei7-avx | FileCheck %s -check-prefix=CHECK32
 ; RUN: opt < %s  -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7-avx | FileCheck %s -check-prefix=CHECK64
 
-; Test vector scalarization costs.
-; RUN: llc < %s -march=x86 -mcpu=i386
-; RUN: llc < %s -march=x86 -mcpu=yonah
-
 %i4 = type <4 x i32>
 %i8 = type <2 x i64>
 
diff --git a/llvm/test/CodeGen/MIR/X86/fixed-stack-memory-operands.mir b/llvm/test/CodeGen/MIR/X86/fixed-stack-memory-operands.mir
index d590851..5715af5 100644
--- a/llvm/test/CodeGen/MIR/X86/fixed-stack-memory-operands.mir
+++ b/llvm/test/CodeGen/MIR/X86/fixed-stack-memory-operands.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86 -run-pass none -o - %s | FileCheck %s
+# RUN: llc -mtriple=i686 -run-pass none -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses fixed stack memory operands
 # correctly.
 
diff --git a/llvm/test/CodeGen/MIR/X86/fixed-stack-object-redefinition-error.mir b/llvm/test/CodeGen/MIR/X86/fixed-stack-object-redefinition-error.mir
index 2ce41fd..575f99d 100644
--- a/llvm/test/CodeGen/MIR/X86/fixed-stack-object-redefinition-error.mir
+++ b/llvm/test/CodeGen/MIR/X86/fixed-stack-object-redefinition-error.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -march=x86 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: not llc -mtriple=i686 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
 
 --- |
 
diff --git a/llvm/test/CodeGen/MIR/X86/fixed-stack-objects.mir b/llvm/test/CodeGen/MIR/X86/fixed-stack-objects.mir
index 7cba6e3..9cbd891 100644
--- a/llvm/test/CodeGen/MIR/X86/fixed-stack-objects.mir
+++ b/llvm/test/CodeGen/MIR/X86/fixed-stack-objects.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86 -run-pass none -o - %s | FileCheck %s
+# RUN: llc -mtriple=i686 -run-pass none -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses fixed stack objects correctly.
 
 --- |
diff --git a/llvm/test/CodeGen/MIR/X86/stack-object-operands.mir b/llvm/test/CodeGen/MIR/X86/stack-object-operands.mir
index 672f829..2977b38 100644
--- a/llvm/test/CodeGen/MIR/X86/stack-object-operands.mir
+++ b/llvm/test/CodeGen/MIR/X86/stack-object-operands.mir
@@ -1,5 +1,5 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -march=x86 -run-pass none -o - %s | FileCheck %s
+# RUN: llc -mtriple=i686 -run-pass none -o - %s | FileCheck %s
 # This test ensures that the MIR parser parses stack object machine operands
 # correctly.
 
diff --git a/llvm/test/CodeGen/X86/2006-10-02-BoolRetCrash.ll b/llvm/test/CodeGen/X86/2006-10-02-BoolRetCrash.ll
index 3b59c11..7f93802 100644
--- a/llvm/test/CodeGen/X86/2006-10-02-BoolRetCrash.ll
+++ b/llvm/test/CodeGen/X86/2006-10-02-BoolRetCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86 < %s
+; RUN: llc -mtriple=i686 < %s
 ; PR933
 
 define fastcc i1 @test() {
diff --git a/llvm/test/MachineVerifier/test_copy_physregs_x86.mir b/llvm/test/MachineVerifier/test_copy_physregs_x86.mir
index 39a15e3..a239379 100644
--- a/llvm/test/MachineVerifier/test_copy_physregs_x86.mir
+++ b/llvm/test/MachineVerifier/test_copy_physregs_x86.mir
@@ -1,4 +1,4 @@
-# RUN: not --crash llc -march=x86-64 -run-pass=none -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s -implicit-check-not="Bad machine code"
+# RUN: not --crash llc -mtriple=x86_64 -run-pass=none -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s -implicit-check-not="Bad machine code"
 # REQUIRES: x86-registered-target
 
 # These copies have mismatched type sizes that are allowed because the
diff --git a/llvm/test/MachineVerifier/verify-regops.mir b/llvm/test/MachineVerifier/verify-regops.mir
index 36a1803..f890395 100644
--- a/llvm/test/MachineVerifier/verify-regops.mir
+++ b/llvm/test/MachineVerifier/verify-regops.mir
@@ -1,4 +1,4 @@
-# RUN: not --crash llc -march=x86 -o - %s -run-pass=none -verify-machineinstrs \
+# RUN: not --crash llc -mtriple=i686 -o - %s -run-pass=none -verify-machineinstrs \
 # RUN:   2>&1 | FileCheck %s
 # REQUIRES: x86-registered-target
 #
diff --git a/llvm/test/Transforms/NaryReassociate/NVPTX/nary-slsr.ll b/llvm/test/Transforms/NaryReassociate/NVPTX/nary-slsr.ll
index face96f..8ec573c 100644
--- a/llvm/test/Transforms/NaryReassociate/NVPTX/nary-slsr.ll
+++ b/llvm/test/Transforms/NaryReassociate/NVPTX/nary-slsr.ll
@@ -1,6 +1,6 @@
 ; RUN: opt < %s -passes=slsr,nary-reassociate -S | FileCheck %s
 ; RUN: opt < %s -passes=slsr -S | opt -passes='nary-reassociate' -S | FileCheck %s
-; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s --check-prefix=PTX
+; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_20 | FileCheck %s --check-prefix=PTX
 
 target datalayout = "e-i64:64-v16:16-v32:32-n16:32:64"