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authorBrad Smith <brad@comstyle.com>2022-06-05 23:28:53 -0400
committerBrad Smith <brad@comstyle.com>2022-06-05 23:28:53 -0400
commitc2d27c89593e92f8e557f27ec02f083760eeab2d (patch)
tree886e9e717581eb54ca98ae112e9c58487c2d23f3
parent5c06f7168fd1bd589b831cacd5f1cb8a928446fb (diff)
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[BPF] Enable IAS in backend
Reviewed By: MaskRay Differential Revision: https://reviews.llvm.org/D123845
-rw-r--r--llvm/lib/Target/BPF/MCTargetDesc/BPFMCAsmInfo.h2
-rw-r--r--llvm/test/CodeGen/BPF/inline_asm.ll4
2 files changed, 2 insertions, 4 deletions
diff --git a/llvm/lib/Target/BPF/MCTargetDesc/BPFMCAsmInfo.h b/llvm/lib/Target/BPF/MCTargetDesc/BPFMCAsmInfo.h
index 3292c3e..14f6b36 100644
--- a/llvm/lib/Target/BPF/MCTargetDesc/BPFMCAsmInfo.h
+++ b/llvm/lib/Target/BPF/MCTargetDesc/BPFMCAsmInfo.h
@@ -41,8 +41,6 @@ public:
// section will be parsable, but with odd offsets and
// line numbers, etc.
CodePointerSize = 8;
-
- UseIntegratedAssembler = false;
}
void setDwarfUsesRelocationsAcrossSections(bool enable) {
diff --git a/llvm/test/CodeGen/BPF/inline_asm.ll b/llvm/test/CodeGen/BPF/inline_asm.ll
index 138e02d..8d14cd9 100644
--- a/llvm/test/CodeGen/BPF/inline_asm.ll
+++ b/llvm/test/CodeGen/BPF/inline_asm.ll
@@ -35,10 +35,10 @@ entry:
%2 = tail call i32 asm sideeffect "$0 = $1 ll", "=r,i"(i64 333333333333) #2
; CHECK: r1 = 333333333333 ll
%3 = call i32 asm sideeffect "$0 = *(u16 *) $1", "=r,*m"(i32* elementtype(i32) nonnull %a) #2
-; CHECK: r1 = *(u16 *) (r10 - 4)
+; CHECK: r1 = *(u16 *)(r10 - 4)
%4 = call i32 asm sideeffect "$0 = *(u32 *) $1", "=r,*m"(i32* elementtype(i32) getelementptr inbounds ([2 x i32], [2 x i32]* @g, i64 0, i64 1)) #2
; CHECK: r1 = g ll
-; CHECK: r0 = *(u32 *) (r1 + 4)
+; CHECK: r0 = *(u32 *)(r1 + 4)
call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %0) #2
ret i32 %4
}