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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2022-11-25 10:54:21 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2022-11-25 11:16:24 +0000 |
| commit | b883e9f3929c44dd7cdf5d94df3973fbf9f879f2 (patch) | |
| tree | c35dba8f4eb8e3b1d2219fc45da3665fd8f995fd | |
| parent | 6a95e67323dd64e6023c0b5ea89407cac2dbc01b (diff) | |
| download | llvm-b883e9f3929c44dd7cdf5d94df3973fbf9f879f2.zip llvm-b883e9f3929c44dd7cdf5d94df3973fbf9f879f2.tar.gz llvm-b883e9f3929c44dd7cdf5d94df3973fbf9f879f2.tar.bz2 | |
[X86] Add test case for (any_extend (bitcast (concat_vectors (and (vYi1 setcc, vYi1 x), undef)))) pattern
Similar pattern to a regression identified in D127115
| -rw-r--r-- | llvm/test/CodeGen/X86/avx512vl-vec-masked-cmp.ll | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/avx512vl-vec-masked-cmp.ll b/llvm/test/CodeGen/X86/avx512vl-vec-masked-cmp.ll index c7fde0a..5fa144c 100644 --- a/llvm/test/CodeGen/X86/avx512vl-vec-masked-cmp.ll +++ b/llvm/test/CodeGen/X86/avx512vl-vec-masked-cmp.ll @@ -1610,6 +1610,38 @@ entry: } +define i32 @test_masked_vpcmpeqd_v4i1_v32i1_mask_i32(i32 %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr { +; VLX-LABEL: test_masked_vpcmpeqd_v4i1_v32i1_mask_i32: +; VLX: # %bb.0: # %entry +; VLX-NEXT: kmovd %edi, %k1 +; VLX-NEXT: vpcmpeqd %xmm1, %xmm0, %k0 {%k1} +; VLX-NEXT: kmovd %k0, %eax +; VLX-NEXT: andl $15, %eax +; VLX-NEXT: retq +; +; NoVLX-LABEL: test_masked_vpcmpeqd_v4i1_v32i1_mask_i32: +; NoVLX: # %bb.0: # %entry +; NoVLX-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1 +; NoVLX-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 +; NoVLX-NEXT: kmovw %edi, %k1 +; NoVLX-NEXT: vpcmpeqd %zmm1, %zmm0, %k0 {%k1} +; NoVLX-NEXT: kmovw %k0, %eax +; NoVLX-NEXT: andl $15, %eax +; NoVLX-NEXT: vzeroupper +; NoVLX-NEXT: retq +entry: + %0 = bitcast <2 x i64> %__a to <4 x i32> + %1 = bitcast <2 x i64> %__b to <4 x i32> + %2 = icmp eq <4 x i32> %0, %1 + %3 = bitcast i32 %__u to <32 x i1> + %extract.i = shufflevector <32 x i1> %3, <32 x i1> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> + %4 = and <4 x i1> %2, %extract.i + %5 = bitcast <4 x i1> %4 to i4 + %6 = zext i4 %5 to i32 + ret i32 %6 +} + + define zeroext i64 @test_vpcmpeqd_v4i1_v64i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr { ; VLX-LABEL: test_vpcmpeqd_v4i1_v64i1_mask: ; VLX: # %bb.0: # %entry |