[NFC] Fix laod -> load typos. NFC

8 files changed, 10 insertions, 10 deletions

diff --git a/clang/lib/Sema/SemaDeclCXX.cpp b/clang/lib/Sema/SemaDeclCXX.cpp
index d38700d..c1189e6 100644
--- a/clang/lib/Sema/SemaDeclCXX.cpp
+++ b/clang/lib/Sema/SemaDeclCXX.cpp
@@ -16111,7 +16111,7 @@ ExprResult Sema::BuildCXXConstructExpr(
     CXXConstructionKind ConstructKind, SourceRange ParenRange) {
   if (auto *Shadow = dyn_cast<ConstructorUsingShadowDecl>(FoundDecl)) {
     Constructor = findInheritingConstructor(ConstructLoc, Constructor, Shadow);
-    // The only way to get here is if we did overlaod resolution to find the
+    // The only way to get here is if we did overload resolution to find the
     // shadow decl, so we don't need to worry about re-checking the trailing
     // requires clause.
     if (DiagnoseUseOfOverloadedDecl(Constructor, ConstructLoc))
diff --git a/clang/test/SemaHLSL/ScalarOverloadResolution.hlsl b/clang/test/SemaHLSL/ScalarOverloadResolution.hlsl
index 41702ef..d1a47af 100644
--- a/clang/test/SemaHLSL/ScalarOverloadResolution.hlsl
+++ b/clang/test/SemaHLSL/ScalarOverloadResolution.hlsl
@@ -72,7 +72,7 @@ void Case1(half H, float F, double D) {
   HalfFloatDouble(D);
 }
 
-// Case 2: A function declared with double and float overlaods.
+// Case 2: A function declared with double and float overloads.
 //   (a) When called with half, it will resolve to float because float is lower
 //   ranked than double.
 //   (b) When called with float it will resolve to float because float is an
diff --git a/clang/test/SemaHLSL/VectorElementOverloadResolution.hlsl b/clang/test/SemaHLSL/VectorElementOverloadResolution.hlsl
index 1257508..bbf8d3b 100644
--- a/clang/test/SemaHLSL/VectorElementOverloadResolution.hlsl
+++ b/clang/test/SemaHLSL/VectorElementOverloadResolution.hlsl
@@ -71,7 +71,7 @@ void Case1(half2 H, float2 F, double2 D) {
   HalfFloatDouble(D);
 }
 
-// Case 2: A function declared with double and float overlaods.
+// Case 2: A function declared with double and float overloads.
 //   (a) When called with half, it will resolve to float because float is lower
 //   ranked than double.
 //   (b) When called with float it will resolve to float because float is an
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp b/llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
index 46d4470..cfe9f33 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
@@ -100,7 +100,7 @@ public:
   bool matchRemoveFcanonicalize(MachineInstr &MI, Register &Reg) const;
 
   // Combine unsigned buffer load and signed extension instructions to generate
-  // signed buffer laod instructions.
+  // signed buffer load instructions.
   bool matchCombineSignExtendInReg(
       MachineInstr &MI, std::pair<MachineInstr *, unsigned> &MatchInfo) const;
   void applyCombineSignExtendInReg(
diff --git a/llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp b/llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
index 471c7ca..4e515e0 100644
--- a/llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
+++ b/llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
@@ -57,7 +57,7 @@
 //
 // base = gep a, 0, x, y
 // load base
-// laod base + 1  * sizeof(float)
+// load base + 1  * sizeof(float)
 // load base + 32 * sizeof(float)
 // load base + 33 * sizeof(float)
 //
diff --git a/llvm/test/CodeGen/AArch64/speculation-hardening-loads.ll b/llvm/test/CodeGen/AArch64/speculation-hardening-loads.ll
index 03b41db..6a95859 100644
--- a/llvm/test/CodeGen/AArch64/speculation-hardening-loads.ll
+++ b/llvm/test/CodeGen/AArch64/speculation-hardening-loads.ll
@@ -22,7 +22,7 @@ define double @ld_double(ptr %p) speculative_load_hardening {
 entry:
   %0 = load double, ptr %p, align 8
   ret double %0
-; Checking that the address laoded from is masked for a floating point load.
+; Checking that the address loaded from is masked for a floating point load.
 ; CHECK-LABEL: ld_double
 ; CHECK:      cmp sp, #0
 ; CHECK-NEXT: csetm x16, ne
@@ -43,7 +43,7 @@ entry:
   %iszero = icmp eq i64 %X, 0
   %ret = select i1 %iszero, i32 %b, i32 %add
   ret i32 %ret
-; Checking that the address laoded from is masked for a floating point load.
+; Checking that the address loaded from is masked for a floating point load.
 ; CHECK-LABEL: csdb_emitted_for_subreg_use
 ; CHECK:      cmp sp, #0
 ; CHECK-NEXT: ldr x8, [x0]
@@ -68,7 +68,7 @@ entry:
   %iszero = icmp eq i32 %X, 0
   %ret = select i1 %iszero, i64 %b, i64 %add
   ret i64 %ret
-; Checking that the address laoded from is masked for a floating point load.
+; Checking that the address loaded from is masked for a floating point load.
 ; CHECK-LABEL: csdb_emitted_for_superreg_use
 ; CHECK:      cmp sp, #0
 ; CHECK-NEXT: ldr w8, [x0]
diff --git a/llvm/test/CodeGen/X86/load-partial-dot-product.ll b/llvm/test/CodeGen/X86/load-partial-dot-product.ll
index 1d7aac7..e74e701 100644
--- a/llvm/test/CodeGen/X86/load-partial-dot-product.ll
+++ b/llvm/test/CodeGen/X86/load-partial-dot-product.ll
@@ -5,7 +5,7 @@
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX
 
-; Partial laod dot product patterns based off PR51075
+; Partial load dot product patterns based off PR51075
 
 ;
 ; dot3(ptr x, ptr y) - ((xptr y[0])+(xptr y[1])+(xptr y[2]))
diff --git a/llvm/test/tools/yaml2obj/COFF/load-config.yaml b/llvm/test/tools/yaml2obj/COFF/load-config.yaml
index 36c66e6..8d177bd 100644
--- a/llvm/test/tools/yaml2obj/COFF/load-config.yaml
+++ b/llvm/test/tools/yaml2obj/COFF/load-config.yaml
@@ -190,7 +190,7 @@ sections:
 symbols: []
 ...
 
-## Create laod config larger than coff_load_configuration32 struct.
+## Create load config larger than coff_load_configuration32 struct.
 # RUN: yaml2obj --docnum=4 %s -o %t
 # RUN: llvm-readobj --hex-dump=.rdata %t | FileCheck %s --check-prefix=LARGE