[CVP] Add vector test cases (NFC)

1 files changed, 182 insertions, 0 deletions

diff --git a/llvm/test/Transforms/CorrelatedValuePropagation/vectors.ll b/llvm/test/Transforms/CorrelatedValuePropagation/vectors.ll
new file mode 100644
index 0000000..9862dd5
--- /dev/null
+++ b/llvm/test/Transforms/CorrelatedValuePropagation/vectors.ll
@@ -0,0 +1,182 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
+; RUN: opt -S -passes=correlated-propagation < %s | FileCheck %s
+
+define <2 x i1> @cmp1(<2 x i8> %a) {
+; CHECK-LABEL: define <2 x i1> @cmp1(
+; CHECK-SAME: <2 x i8> [[A:%.*]]) {
+; CHECK-NEXT:    [[ADD:%.*]] = add nuw <2 x i8> [[A]], <i8 1, i8 1>
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne <2 x i8> [[ADD]], zeroinitializer
+; CHECK-NEXT:    ret <2 x i1> [[CMP]]
+;
+  %add = add nuw <2 x i8> %a, splat (i8 1)
+  %cmp = icmp ne <2 x i8> %add, zeroinitializer
+  ret <2 x i1> %cmp
+}
+
+define <2 x i1> @cmp2(<2 x i8> %a) {
+; CHECK-LABEL: define <2 x i1> @cmp2(
+; CHECK-SAME: <2 x i8> [[A:%.*]]) {
+; CHECK-NEXT:    [[ADD:%.*]] = add nuw <2 x i8> [[A]], <i8 5, i8 5>
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt <2 x i8> [[ADD]], <i8 2, i8 2>
+; CHECK-NEXT:    ret <2 x i1> [[CMP]]
+;
+  %add = add nuw <2 x i8> %a, splat (i8 5)
+  %cmp = icmp ugt <2 x i8> %add, splat (i8 2)
+  ret <2 x i1> %cmp
+}
+
+define <2 x i1> @cmp_signedness(<2 x i8> %a) {
+; CHECK-LABEL: define <2 x i1> @cmp_signedness(
+; CHECK-SAME: <2 x i8> [[A:%.*]]) {
+; CHECK-NEXT:    [[ZEXT:%.*]] = zext <2 x i8> [[A]] to <2 x i16>
+; CHECK-NEXT:    [[CMP:%.*]] = icmp slt <2 x i16> [[ZEXT]], <i16 5, i16 5>
+; CHECK-NEXT:    ret <2 x i1> [[CMP]]
+;
+  %zext = zext <2 x i8> %a to <2 x i16>
+  %cmp = icmp slt <2 x i16> %zext, splat (i16 5)
+  ret <2 x i1> %cmp
+}
+
+define <2 x i16> @infer_nowrap(<2 x i8> %a) {
+; CHECK-LABEL: define <2 x i16> @infer_nowrap(
+; CHECK-SAME: <2 x i8> [[A:%.*]]) {
+; CHECK-NEXT:    [[ZEXT:%.*]] = zext <2 x i8> [[A]] to <2 x i16>
+; CHECK-NEXT:    [[RES:%.*]] = add <2 x i16> [[ZEXT]], <i16 1, i16 1>
+; CHECK-NEXT:    ret <2 x i16> [[RES]]
+;
+  %zext = zext <2 x i8> %a to <2 x i16>
+  %res = add <2 x i16> %zext, splat (i16 1)
+  ret <2 x i16> %res
+}
+
+define <2 x i16> @infer_nowrap_nonsplat(<2 x i8> %a) {
+; CHECK-LABEL: define <2 x i16> @infer_nowrap_nonsplat(
+; CHECK-SAME: <2 x i8> [[A:%.*]]) {
+; CHECK-NEXT:    [[ZEXT:%.*]] = zext <2 x i8> [[A]] to <2 x i16>
+; CHECK-NEXT:    [[RES:%.*]] = add <2 x i16> [[ZEXT]], <i16 1, i16 2>
+; CHECK-NEXT:    ret <2 x i16> [[RES]]
+;
+  %zext = zext <2 x i8> %a to <2 x i16>
+  %res = add <2 x i16> %zext, <i16 1, i16 2>
+  ret <2 x i16> %res
+}
+
+define <2 x i16> @infer_nowrap_nonsplat_nsw_only(<2 x i8> %a) {
+; CHECK-LABEL: define <2 x i16> @infer_nowrap_nonsplat_nsw_only(
+; CHECK-SAME: <2 x i8> [[A:%.*]]) {
+; CHECK-NEXT:    [[ZEXT:%.*]] = zext <2 x i8> [[A]] to <2 x i16>
+; CHECK-NEXT:    [[RES:%.*]] = add <2 x i16> [[ZEXT]], <i16 1, i16 -1>
+; CHECK-NEXT:    ret <2 x i16> [[RES]]
+;
+  %zext = zext <2 x i8> %a to <2 x i16>
+  %res = add <2 x i16> %zext, <i16 1, i16 -1>
+  ret <2 x i16> %res
+}
+
+define <2 x i16> @abs(<2 x i8> %a) {
+; CHECK-LABEL: define <2 x i16> @abs(
+; CHECK-SAME: <2 x i8> [[A:%.*]]) {
+; CHECK-NEXT:    [[ZEXT:%.*]] = zext <2 x i8> [[A]] to <2 x i16>
+; CHECK-NEXT:    [[RES:%.*]] = call <2 x i16> @llvm.abs.v2i16(<2 x i16> [[ZEXT]], i1 false)
+; CHECK-NEXT:    ret <2 x i16> [[RES]]
+;
+  %zext = zext <2 x i8> %a to <2 x i16>
+  %res = call <2 x i16> @llvm.abs(<2 x i16> %zext, i1 false)
+  ret <2 x i16> %res
+}
+
+define <2 x i16> @saturating(<2 x i8> %a) {
+; CHECK-LABEL: define <2 x i16> @saturating(
+; CHECK-SAME: <2 x i8> [[A:%.*]]) {
+; CHECK-NEXT:    [[ZEXT:%.*]] = zext <2 x i8> [[A]] to <2 x i16>
+; CHECK-NEXT:    [[RES:%.*]] = call <2 x i16> @llvm.uadd.sat.v2i16(<2 x i16> [[ZEXT]], <2 x i16> <i16 1, i16 1>)
+; CHECK-NEXT:    ret <2 x i16> [[RES]]
+;
+  %zext = zext <2 x i8> %a to <2 x i16>
+  %res = call <2 x i16> @llvm.uadd.sat(<2 x i16> %zext, <2 x i16> splat (i16 1))
+  ret <2 x i16> %res
+}
+
+define {<2 x i16>, <2 x i1>} @with_overflow(<2 x i8> %a) {
+; CHECK-LABEL: define { <2 x i16>, <2 x i1> } @with_overflow(
+; CHECK-SAME: <2 x i8> [[A:%.*]]) {
+; CHECK-NEXT:    [[ZEXT:%.*]] = zext <2 x i8> [[A]] to <2 x i16>
+; CHECK-NEXT:    [[RES:%.*]] = call { <2 x i16>, <2 x i1> } @llvm.uadd.with.overflow.v2i16(<2 x i16> [[ZEXT]], <2 x i16> <i16 1, i16 1>)
+; CHECK-NEXT:    ret { <2 x i16>, <2 x i1> } [[RES]]
+;
+  %zext = zext <2 x i8> %a to <2 x i16>
+  %res = call {<2 x i16>, <2 x i1>} @llvm.uadd.with.overflow(<2 x i16> %zext, <2 x i16> splat (i16 1))
+  ret {<2 x i16>, <2 x i1>} %res
+}
+
+define <2 x i16> @srem1(<2 x i8> %a) {
+; CHECK-LABEL: define <2 x i16> @srem1(
+; CHECK-SAME: <2 x i8> [[A:%.*]]) {
+; CHECK-NEXT:    [[ZEXT:%.*]] = zext <2 x i8> [[A]] to <2 x i16>
+; CHECK-NEXT:    [[RES:%.*]] = srem <2 x i16> [[ZEXT]], <i16 42, i16 42>
+; CHECK-NEXT:    ret <2 x i16> [[RES]]
+;
+  %zext = zext <2 x i8> %a to <2 x i16>
+  %res = srem <2 x i16> %zext, splat (i16 42)
+  ret <2 x i16> %res
+}
+
+define <2 x i16> @srem2(<2 x i8> %a) {
+; CHECK-LABEL: define <2 x i16> @srem2(
+; CHECK-SAME: <2 x i8> [[A:%.*]]) {
+; CHECK-NEXT:    [[ZEXT:%.*]] = sext <2 x i8> [[A]] to <2 x i16>
+; CHECK-NEXT:    [[RES:%.*]] = srem <2 x i16> [[ZEXT]], <i16 42, i16 42>
+; CHECK-NEXT:    ret <2 x i16> [[RES]]
+;
+  %zext = sext <2 x i8> %a to <2 x i16>
+  %res = srem <2 x i16> %zext, splat (i16 42)
+  ret <2 x i16> %res
+}
+
+define <2 x i16> @ashr(<2 x i8> %a) {
+; CHECK-LABEL: define <2 x i16> @ashr(
+; CHECK-SAME: <2 x i8> [[A:%.*]]) {
+; CHECK-NEXT:    [[ZEXT:%.*]] = zext <2 x i8> [[A]] to <2 x i16>
+; CHECK-NEXT:    [[RES:%.*]] = ashr <2 x i16> [[ZEXT]], <i16 1, i16 1>
+; CHECK-NEXT:    ret <2 x i16> [[RES]]
+;
+  %zext = zext <2 x i8> %a to <2 x i16>
+  %res = ashr <2 x i16> %zext, splat (i16 1)
+  ret <2 x i16> %res
+}
+
+define <2 x i32> @sext(<2 x i8> %a) {
+; CHECK-LABEL: define <2 x i32> @sext(
+; CHECK-SAME: <2 x i8> [[A:%.*]]) {
+; CHECK-NEXT:    [[ZEXT:%.*]] = zext <2 x i8> [[A]] to <2 x i16>
+; CHECK-NEXT:    [[RES:%.*]] = sext <2 x i16> [[ZEXT]] to <2 x i32>
+; CHECK-NEXT:    ret <2 x i32> [[RES]]
+;
+  %zext = zext <2 x i8> %a to <2 x i16>
+  %res = sext <2 x i16> %zext to <2 x i32>
+  ret <2 x i32> %res
+}
+
+define <2 x float> @sitofp(<2 x i8> %a) {
+; CHECK-LABEL: define <2 x float> @sitofp(
+; CHECK-SAME: <2 x i8> [[A:%.*]]) {
+; CHECK-NEXT:    [[ZEXT:%.*]] = zext <2 x i8> [[A]] to <2 x i16>
+; CHECK-NEXT:    [[RES:%.*]] = sitofp <2 x i16> [[ZEXT]] to <2 x float>
+; CHECK-NEXT:    ret <2 x float> [[RES]]
+;
+  %zext = zext <2 x i8> %a to <2 x i16>
+  %res = sitofp <2 x i16> %zext to <2 x float>
+  ret <2 x float> %res
+}
+
+define <2 x i16> @and(<2 x i8> %a) {
+; CHECK-LABEL: define <2 x i16> @and(
+; CHECK-SAME: <2 x i8> [[A:%.*]]) {
+; CHECK-NEXT:    [[ZEXT:%.*]] = zext <2 x i8> [[A]] to <2 x i16>
+; CHECK-NEXT:    [[RES:%.*]] = and <2 x i16> [[ZEXT]], <i16 255, i16 255>
+; CHECK-NEXT:    ret <2 x i16> [[RES]]
+;
+  %zext = zext <2 x i8> %a to <2 x i16>
+  %res = and <2 x i16> %zext, splat (i16 u0xff)
+  ret <2 x i16> %res
+}