diff options
| author | Tim Northover <tnorthover@apple.com> | 2016-02-25 16:54:52 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2016-02-25 16:54:52 +0000 |
| commit | aa35bd26c79d93c73579d73e7ba55345afeddbd5 (patch) | |
| tree | 4421fb1cfd0e6a6f91d0511e19861d7bb07776ff | |
| parent | 026b80568764b0995e4015091b767fe5fcff398c (diff) | |
| download | llvm-aa35bd26c79d93c73579d73e7ba55345afeddbd5.zip llvm-aa35bd26c79d93c73579d73e7ba55345afeddbd5.tar.gz llvm-aa35bd26c79d93c73579d73e7ba55345afeddbd5.tar.bz2 | |
ARM: disallow pc as a base register in Thumb2 memory ops.
These should all be deferring to the "OP (literal)" variant according to the
ARM ARM.
llvm-svn: 261895
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrThumb2.td | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 2 | ||||
| -rw-r--r-- | llvm/test/MC/ARM/thumb2-diagnostics.s | 16 |
3 files changed, 18 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrThumb2.td b/llvm/lib/Target/ARM/ARMInstrThumb2.td index 48c72be..e702864 100644 --- a/llvm/lib/Target/ARM/ARMInstrThumb2.td +++ b/llvm/lib/Target/ARM/ARMInstrThumb2.td @@ -270,7 +270,7 @@ def t2addrmode_so_reg : MemOperand, let EncoderMethod = "getT2AddrModeSORegOpValue"; let DecoderMethod = "DecodeT2AddrModeSOReg"; let ParserMatchClass = t2addrmode_so_reg_asmoperand; - let MIOperandInfo = (ops GPR:$base, rGPR:$offsreg, i32imm:$offsimm); + let MIOperandInfo = (ops GPRnopc:$base, rGPR:$offsreg, i32imm:$offsimm); } // Addresses for the TBB/TBH instructions. diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index 930b5c6..84745e4 100644 --- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -1226,7 +1226,7 @@ public: } bool isT2MemRegOffset() const { if (!isMem() || !Memory.OffsetRegNum || Memory.isNegative || - Memory.Alignment != 0) + Memory.Alignment != 0 || Memory.BaseRegNum == ARM::PC) return false; // Only lsl #{0, 1, 2, 3} allowed. if (Memory.ShiftType == ARM_AM::no_shift) diff --git a/llvm/test/MC/ARM/thumb2-diagnostics.s b/llvm/test/MC/ARM/thumb2-diagnostics.s index 9697889..38cc74d 100644 --- a/llvm/test/MC/ARM/thumb2-diagnostics.s +++ b/llvm/test/MC/ARM/thumb2-diagnostics.s @@ -102,3 +102,19 @@ foo2: @ CHECK-ERRORS: error: invalid operand for instruction @ CHECK-ERRORS: error: invalid operand for instruction + + @ PC is not valid as base of load + ldr r0, [pc, r0] + ldrb r1, [pc, r2] + ldrh r3, [pc, r3] + pld r4, [pc, r5] + str r6, [pc, r7] + strb r7 [pc, r8] + strh r9, [pc, r10] +@ CHECK-ERRORS: error: instruction requires: arm-mode +@ CHECK-ERRORS: error: instruction requires: arm-mode +@ CHECK-ERRORS: error: instruction requires: arm-mode +@ CHECK-ERRORS: error: invalid operand for instruction +@ CHECK-ERRORS: error: instruction requires: arm-mode +@ CHECK-ERRORS: error: immediate value expected for vector index +@ CHECK-ERRORS: error: instruction requires: arm-mode |