aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorCameron Esfahani <dirty@apple.com>2010-10-08 10:31:30 +0000
committerCameron Esfahani <dirty@apple.com>2010-10-08 10:31:30 +0000
commita07b5c291df5728b43788ac7cf230ad0ef7ef966 (patch)
tree71c32cd16e196016e3eecd305c14496d871dc113
parent056b694de1b07b559b201770994ad156cde966de (diff)
downloadllvm-a07b5c291df5728b43788ac7cf230ad0ef7ef966.zip
llvm-a07b5c291df5728b43788ac7cf230ad0ef7ef966.tar.gz
llvm-a07b5c291df5728b43788ac7cf230ad0ef7ef966.tar.bz2
Small patch to restore home register stack space allocation for the Win64 case. Add test case. This code eventually needs to be tighter, since it's always allocating it, even in leaf routines.
llvm-svn: 116056
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp6
-rw-r--r--llvm/test/CodeGen/X86/win64_params.ll11
2 files changed, 16 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 66f9612..27226d8 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -1701,8 +1701,12 @@ X86TargetLowering::LowerFormalArguments(SDValue Chain,
TotalNumXMMRegs = 0;
if (IsWin64) {
+ const TargetFrameInfo &TFI = *getTargetMachine().getFrameInfo();
+ // Get to the caller-allocated home save location. Add 8 to account
+ // for the return address.
+ int HomeOffset = TFI.getOffsetOfLocalArea() + 8;
FuncInfo->setRegSaveFrameIndex(
- MFI->CreateFixedObject(1, NumIntRegs * 8, false));
+ MFI->CreateFixedObject(1, NumIntRegs * 8 + HomeOffset, false));
FuncInfo->setVarArgsFrameIndex(FuncInfo->getRegSaveFrameIndex());
} else {
// For X86-64, if there are vararg parameters that are passed via
diff --git a/llvm/test/CodeGen/X86/win64_params.ll b/llvm/test/CodeGen/X86/win64_params.ll
new file mode 100644
index 0000000..0b67368
--- /dev/null
+++ b/llvm/test/CodeGen/X86/win64_params.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -mtriple=x86_64-pc-win32 | FileCheck %s
+
+; Verify that the 5th and 6th parameters are coming from the correct location
+; on the stack.
+define i32 @f6(i32 %p1, i32 %p2, i32 %p3, i32 %p4, i32 %p5, i32 %p6) nounwind readnone optsize {
+entry:
+; CHECK: movl 80(%rsp), %eax
+; CHECK: addl 72(%rsp), %eax
+ %add = add nsw i32 %p6, %p5
+ ret i32 %add
+}