aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorPhilip Reames <preames@rivosinc.com>2022-06-24 13:08:39 -0700
committerPhilip Reames <listmail@philipreames.com>2022-06-24 13:08:39 -0700
commita0443dd47c84abd1ea7a4c3c4e6f14d38a08388a (patch)
tree26e12b995c424182ddad84e18e5925050b19e90f
parentf1e1c3ce772565d77a920119dcd0b43622059fb1 (diff)
downloadllvm-a0443dd47c84abd1ea7a4c3c4e6f14d38a08388a.zip
llvm-a0443dd47c84abd1ea7a4c3c4e6f14d38a08388a.tar.gz
llvm-a0443dd47c84abd1ea7a4c3c4e6f14d38a08388a.tar.bz2
[RISCV] Simplify 16 bit index handling in lowerVECTOR_REVERSE [nfc]
getRealMaxVLen returns an upper bound on the value of VLEN. We can use this upper bound (which unless explicitly set at command line is going to result in a e8 MaxVLMax of much greater than 256) instead of explicitly handling the unknown case separately from the bounded by number greater than 256 case. Note as well that this code already implicitly depends on a capped value for VLEN. If infinite VLEN were possible, than 16 bit indices wouldn't be enough.
-rw-r--r--llvm/lib/Target/RISCV/RISCVISelLowering.cpp13
1 files changed, 5 insertions, 8 deletions
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 3f608d7..04d3e9f 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -5640,21 +5640,18 @@ SDValue RISCVTargetLowering::lowerVECTOR_REVERSE(SDValue Op,
MVT VecVT = Op.getSimpleValueType();
unsigned EltSize = VecVT.getScalarSizeInBits();
unsigned MinSize = VecVT.getSizeInBits().getKnownMinValue();
-
- unsigned MaxVLMAX = 0;
- unsigned VectorBitsMax = Subtarget.getMaxRVVVectorSizeInBits();
- if (VectorBitsMax != 0)
- MaxVLMAX =
- RISCVTargetLowering::computeVLMAX(VectorBitsMax, EltSize, MinSize);
+ unsigned VectorBitsMax = Subtarget.getRealMaxVLen();
+ unsigned MaxVLMAX =
+ RISCVTargetLowering::computeVLMAX(VectorBitsMax, EltSize, MinSize);
unsigned GatherOpc = RISCVISD::VRGATHER_VV_VL;
MVT IntVT = VecVT.changeVectorElementTypeToInteger();
- // If this is SEW=8 and VLMAX is unknown or more than 256, we need
+ // If this is SEW=8 and VLMAX is potentially more than 256, we need
// to use vrgatherei16.vv.
// TODO: It's also possible to use vrgatherei16.vv for other types to
// decrease register width for the index calculation.
- if ((MaxVLMAX == 0 || MaxVLMAX > 256) && EltSize == 8) {
+ if (MaxVLMAX > 256 && EltSize == 8) {
// If this is LMUL=8, we have to split before can use vrgatherei16.vv.
// Reverse each half, then reassemble them in reverse order.
// NOTE: It's also possible that after splitting that VLMAX no longer