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| author | Sanjay Patel <spatel@rotateright.com> | 2018-07-02 13:40:54 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2018-07-02 13:40:54 +0000 |
| commit | 951f617e163e90eb89419e34e642b16c52ad6cc8 (patch) | |
| tree | 431d84f6fe41c97b849dd070ef2dbef4f1bb393b | |
| parent | 42485ec9ca06bb20c6780330f94a12b8d7cb29e8 (diff) | |
| download | llvm-951f617e163e90eb89419e34e642b16c52ad6cc8.zip llvm-951f617e163e90eb89419e34e642b16c52ad6cc8.tar.gz llvm-951f617e163e90eb89419e34e642b16c52ad6cc8.tar.bz2 | |
[InstCombine] adjust shuffle tests with IR flags; NFC
Due to current limitations in constant analysis, we need flags
on add or mul to show propagation for the potential transform
suggested in these tests (no other binops currently report
identity constants).
llvm-svn: 336101
| -rw-r--r-- | llvm/test/Transforms/InstCombine/shuffle_select.ll | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/llvm/test/Transforms/InstCombine/shuffle_select.ll b/llvm/test/Transforms/InstCombine/shuffle_select.ll index 2ff69c7..241d5f2 100644 --- a/llvm/test/Transforms/InstCombine/shuffle_select.ll +++ b/llvm/test/Transforms/InstCombine/shuffle_select.ll @@ -30,20 +30,19 @@ define <4 x i32> @sub(<4 x i32> %v) { ; If any element of the shuffle mask operand is undef, that element of the result is undef. ; The shuffle is eliminated in this transform, but we can replace a constant element with undef. +; Preserve flags when possible. define <4 x i32> @mul(<4 x i32> %v) { ; CHECK-LABEL: @mul( -; CHECK-NEXT: [[B:%.*]] = mul <4 x i32> [[V:%.*]], <i32 undef, i32 12, i32 undef, i32 14> +; CHECK-NEXT: [[B:%.*]] = mul nuw nsw <4 x i32> [[V:%.*]], <i32 undef, i32 12, i32 undef, i32 14> ; CHECK-NEXT: [[S:%.*]] = shufflevector <4 x i32> [[V]], <4 x i32> [[B]], <4 x i32> <i32 undef, i32 5, i32 2, i32 7> ; CHECK-NEXT: ret <4 x i32> [[S]] ; - %b = mul <4 x i32> %v, <i32 11, i32 12, i32 13, i32 14> + %b = mul nsw nuw <4 x i32> %v, <i32 11, i32 12, i32 13, i32 14> %s = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 undef, i32 5, i32 2, i32 7> ret <4 x i32> %s } -; Preserve flags when possible. - define <4 x i32> @shl(<4 x i32> %v) { ; CHECK-LABEL: @shl( ; CHECK-NEXT: [[B:%.*]] = shl nuw <4 x i32> [[V:%.*]], <i32 11, i32 12, i32 13, i32 14> |