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| author | Craig Topper <craig.topper@sifive.com> | 2024-01-30 20:34:54 -0800 |
|---|---|---|
| committer | Craig Topper <craig.topper@sifive.com> | 2024-01-30 20:46:01 -0800 |
| commit | 9179d87abce8e92c0bf30bc1ee1c17e17e362bc0 (patch) | |
| tree | 8458eedf5e1407c7f1362a14f61728f7ba6ca737 | |
| parent | fa3307eb3f47b0bd574fc754934f98c0f27e4e36 (diff) | |
| download | llvm-9179d87abce8e92c0bf30bc1ee1c17e17e362bc0.zip llvm-9179d87abce8e92c0bf30bc1ee1c17e17e362bc0.tar.gz llvm-9179d87abce8e92c0bf30bc1ee1c17e17e362bc0.tar.bz2 | |
[RISCV] Remove unused RISCVISD opcodes. NFC
These were left behind after fb94c6491a114ebd5815b1d42665a8f6bcd9d639
| -rw-r--r-- | llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 44 | ||||
| -rw-r--r-- | llvm/lib/Target/RISCV/RISCVISelLowering.h | 44 |
2 files changed, 0 insertions, 88 deletions
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp index 8283634..2f84dff 100644 --- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp +++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp @@ -19143,50 +19143,6 @@ const char *RISCVTargetLowering::getTargetNodeName(unsigned Opcode) const { NODE_NAME_CASE(SWAP_CSR) NODE_NAME_CASE(CZERO_EQZ) NODE_NAME_CASE(CZERO_NEZ) - NODE_NAME_CASE(SF_VC_X_SE_E8MF8) - NODE_NAME_CASE(SF_VC_X_SE_E8MF4) - NODE_NAME_CASE(SF_VC_X_SE_E8MF2) - NODE_NAME_CASE(SF_VC_X_SE_E8M1) - NODE_NAME_CASE(SF_VC_X_SE_E8M2) - NODE_NAME_CASE(SF_VC_X_SE_E8M4) - NODE_NAME_CASE(SF_VC_X_SE_E8M8) - NODE_NAME_CASE(SF_VC_X_SE_E16MF4) - NODE_NAME_CASE(SF_VC_X_SE_E16MF2) - NODE_NAME_CASE(SF_VC_X_SE_E16M1) - NODE_NAME_CASE(SF_VC_X_SE_E16M2) - NODE_NAME_CASE(SF_VC_X_SE_E16M4) - NODE_NAME_CASE(SF_VC_X_SE_E16M8) - NODE_NAME_CASE(SF_VC_X_SE_E32MF2) - NODE_NAME_CASE(SF_VC_X_SE_E32M1) - NODE_NAME_CASE(SF_VC_X_SE_E32M2) - NODE_NAME_CASE(SF_VC_X_SE_E32M4) - NODE_NAME_CASE(SF_VC_X_SE_E32M8) - NODE_NAME_CASE(SF_VC_X_SE_E64M1) - NODE_NAME_CASE(SF_VC_X_SE_E64M2) - NODE_NAME_CASE(SF_VC_X_SE_E64M4) - NODE_NAME_CASE(SF_VC_X_SE_E64M8) - NODE_NAME_CASE(SF_VC_I_SE_E8MF8) - NODE_NAME_CASE(SF_VC_I_SE_E8MF4) - NODE_NAME_CASE(SF_VC_I_SE_E8MF2) - NODE_NAME_CASE(SF_VC_I_SE_E8M1) - NODE_NAME_CASE(SF_VC_I_SE_E8M2) - NODE_NAME_CASE(SF_VC_I_SE_E8M4) - NODE_NAME_CASE(SF_VC_I_SE_E8M8) - NODE_NAME_CASE(SF_VC_I_SE_E16MF4) - NODE_NAME_CASE(SF_VC_I_SE_E16MF2) - NODE_NAME_CASE(SF_VC_I_SE_E16M1) - NODE_NAME_CASE(SF_VC_I_SE_E16M2) - NODE_NAME_CASE(SF_VC_I_SE_E16M4) - NODE_NAME_CASE(SF_VC_I_SE_E16M8) - NODE_NAME_CASE(SF_VC_I_SE_E32MF2) - NODE_NAME_CASE(SF_VC_I_SE_E32M1) - NODE_NAME_CASE(SF_VC_I_SE_E32M2) - NODE_NAME_CASE(SF_VC_I_SE_E32M4) - NODE_NAME_CASE(SF_VC_I_SE_E32M8) - NODE_NAME_CASE(SF_VC_I_SE_E64M1) - NODE_NAME_CASE(SF_VC_I_SE_E64M2) - NODE_NAME_CASE(SF_VC_I_SE_E64M4) - NODE_NAME_CASE(SF_VC_I_SE_E64M8) NODE_NAME_CASE(SF_VC_XV_SE) NODE_NAME_CASE(SF_VC_IV_SE) NODE_NAME_CASE(SF_VC_VV_SE) diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.h b/llvm/lib/Target/RISCV/RISCVISelLowering.h index c8afa7c..255b1d0 100644 --- a/llvm/lib/Target/RISCV/RISCVISelLowering.h +++ b/llvm/lib/Target/RISCV/RISCVISelLowering.h @@ -418,50 +418,6 @@ enum NodeType : unsigned { STRICT_VFROUND_NOEXCEPT_VL, LAST_RISCV_STRICTFP_OPCODE = STRICT_VFROUND_NOEXCEPT_VL, - SF_VC_X_SE_E8MF8, - SF_VC_X_SE_E8MF4, - SF_VC_X_SE_E8MF2, - SF_VC_X_SE_E8M1, - SF_VC_X_SE_E8M2, - SF_VC_X_SE_E8M4, - SF_VC_X_SE_E8M8, - SF_VC_X_SE_E16MF4, - SF_VC_X_SE_E16MF2, - SF_VC_X_SE_E16M1, - SF_VC_X_SE_E16M2, - SF_VC_X_SE_E16M4, - SF_VC_X_SE_E16M8, - SF_VC_X_SE_E32MF2, - SF_VC_X_SE_E32M1, - SF_VC_X_SE_E32M2, - SF_VC_X_SE_E32M4, - SF_VC_X_SE_E32M8, - SF_VC_X_SE_E64M1, - SF_VC_X_SE_E64M2, - SF_VC_X_SE_E64M4, - SF_VC_X_SE_E64M8, - SF_VC_I_SE_E8MF8, - SF_VC_I_SE_E8MF4, - SF_VC_I_SE_E8MF2, - SF_VC_I_SE_E8M1, - SF_VC_I_SE_E8M2, - SF_VC_I_SE_E8M4, - SF_VC_I_SE_E8M8, - SF_VC_I_SE_E16MF4, - SF_VC_I_SE_E16MF2, - SF_VC_I_SE_E16M1, - SF_VC_I_SE_E16M2, - SF_VC_I_SE_E16M4, - SF_VC_I_SE_E16M8, - SF_VC_I_SE_E32MF2, - SF_VC_I_SE_E32M1, - SF_VC_I_SE_E32M2, - SF_VC_I_SE_E32M4, - SF_VC_I_SE_E32M8, - SF_VC_I_SE_E64M1, - SF_VC_I_SE_E64M2, - SF_VC_I_SE_E64M4, - SF_VC_I_SE_E64M8, SF_VC_XV_SE, SF_VC_IV_SE, SF_VC_VV_SE, |