[RISCV] Use inheritance to reduce repeated code in RISCVInstrInfoV.td. NFC

Reviewed By: pcwang-thead

Differential Revision: https://reviews.llvm.org/D152343

1 files changed, 73 insertions, 94 deletions

diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoV.td b/llvm/lib/Target/RISCV/RISCVInstrInfoV.td
index ed7e647..0414a41 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoV.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoV.td
@@ -442,36 +442,37 @@ multiclass VIndexLoadStore<list<int> EEWList> {
   }
 }
 
-multiclass VALU_IV_V_X_I<string opcodestr, bits<6> funct6> {
+multiclass VALU_IV_V<string opcodestr, bits<6> funct6> {
   def V  : VALUVV<funct6, OPIVV, opcodestr # ".vv">,
            Sched<[WriteVIALUV_WorstCase, ReadVIALUV_WorstCase,
                   ReadVIALUV_WorstCase, ReadVMask]>;
-  def X  : VALUVX<funct6, OPIVX, opcodestr # ".vx">,
-           Sched<[WriteVIALUX_WorstCase, ReadVIALUV_WorstCase,
-                  ReadVIALUX_WorstCase, ReadVMask]>;
-  def I  : VALUVI<funct6, opcodestr # ".vi", simm5>,
-           Sched<[WriteVIALUI_WorstCase, ReadVIALUV_WorstCase,
-                  ReadVMask]>;
 }
 
-multiclass VALU_IV_V_X<string opcodestr, bits<6> funct6> {
-  def V  : VALUVV<funct6, OPIVV, opcodestr # ".vv">,
-           Sched<[WriteVIALUV_WorstCase, ReadVIALUV_WorstCase,
-                  ReadVIALUV_WorstCase, ReadVMask]>;
+multiclass VALU_IV_X<string opcodestr, bits<6> funct6> {
   def X  : VALUVX<funct6, OPIVX, opcodestr # ".vx">,
            Sched<[WriteVIALUX_WorstCase, ReadVIALUV_WorstCase,
                   ReadVIALUX_WorstCase, ReadVMask]>;
 }
 
-multiclass VALU_IV_X_I<string opcodestr, bits<6> funct6> {
-  def X  : VALUVX<funct6, OPIVX, opcodestr # ".vx">,
-           Sched<[WriteVIALUX_WorstCase, ReadVIALUV_WorstCase,
-                  ReadVIALUX_WorstCase, ReadVMask]>;
+multiclass VALU_IV_I<string opcodestr, bits<6> funct6> {
   def I  : VALUVI<funct6, opcodestr # ".vi", simm5>,
            Sched<[WriteVIALUI_WorstCase, ReadVIALUV_WorstCase,
                   ReadVMask]>;
 }
 
+multiclass VALU_IV_V_X_I<string opcodestr, bits<6> funct6>
+    : VALU_IV_V<opcodestr, funct6>,
+      VALU_IV_X<opcodestr, funct6>,
+      VALU_IV_I<opcodestr, funct6>;
+
+multiclass VALU_IV_V_X<string opcodestr, bits<6> funct6>
+    : VALU_IV_V<opcodestr, funct6>,
+      VALU_IV_X<opcodestr, funct6>;
+
+multiclass VALU_IV_X_I<string opcodestr, bits<6> funct6>
+    : VALU_IV_X<opcodestr, funct6>,
+      VALU_IV_I<opcodestr, funct6>;
+
 multiclass VALU_MV_V_X<string opcodestr, bits<6> funct6, string vw> {
   def V  : VALUVV<funct6, OPMVV, opcodestr # "." # vw # "v">,
            Sched<[WriteVIWALUV_WorstCase, ReadVIWALUV_WorstCase,
@@ -490,19 +491,17 @@ multiclass VMAC_MV_V_X<string opcodestr, bits<6> funct6> {
                  ReadVIMulAddX_WorstCase, ReadVMask]>;
 }
 
-multiclass VWMAC_MV_V_X<string opcodestr, bits<6> funct6> {
-  def V : VALUrVV<funct6, OPMVV, opcodestr # ".vv">,
-          Sched<[WriteVIWMulAddV_WorstCase, ReadVIWMulAddV_WorstCase,
-                 ReadVIWMulAddV_WorstCase, ReadVMask]>;
+multiclass VWMAC_MV_X<string opcodestr, bits<6> funct6> {
   def X : VALUrVX<funct6, OPMVX, opcodestr # ".vx">,
           Sched<[WriteVIWMulAddX_WorstCase, ReadVIWMulAddV_WorstCase,
                  ReadVIWMulAddX_WorstCase, ReadVMask]>;
 }
 
-multiclass VWMAC_MV_X<string opcodestr, bits<6> funct6> {
-  def X : VALUrVX<funct6, OPMVX, opcodestr # ".vx">,
-          Sched<[WriteVIWMulAddX_WorstCase, ReadVIWMulAddV_WorstCase,
-                 ReadVIWMulAddX_WorstCase, ReadVMask]>;
+multiclass VWMAC_MV_V_X<string opcodestr, bits<6> funct6>
+   : VWMAC_MV_X<opcodestr, funct6> {
+  def V : VALUrVV<funct6, OPMVV, opcodestr # ".vv">,
+          Sched<[WriteVIWMulAddV_WorstCase, ReadVIWMulAddV_WorstCase,
+                 ReadVIWMulAddV_WorstCase, ReadVMask]>;
 }
 
 multiclass VALU_MV_VS2<string opcodestr, bits<6> funct6, bits<5> vs1> {
@@ -510,18 +509,6 @@ multiclass VALU_MV_VS2<string opcodestr, bits<6> funct6, bits<5> vs1> {
            Sched<[WriteVExtV_WorstCase, ReadVExtV_WorstCase, ReadVMask]>;
 }
 
-multiclass VALUm_IV_V_X_I<string opcodestr, bits<6> funct6> {
-  def VM : VALUmVV<funct6, OPIVV, opcodestr # ".vvm">,
-           Sched<[WriteVICALUV_WorstCase, ReadVICALUV_WorstCase,
-                  ReadVICALUV_WorstCase, ReadVMask]>;
-  def XM : VALUmVX<funct6, OPIVX, opcodestr # ".vxm">,
-           Sched<[WriteVICALUX_WorstCase, ReadVICALUV_WorstCase,
-                  ReadVICALUX_WorstCase, ReadVMask]>;
-  def IM : VALUmVI<funct6, opcodestr # ".vim">,
-           Sched<[WriteVICALUI_WorstCase, ReadVICALUV_WorstCase,
-                  ReadVMask]>;
-}
-
 multiclass VMRG_IV_V_X_I<string opcodestr, bits<6> funct6> {
   def VM : VALUmVV<funct6, OPIVV, opcodestr # ".vvm">,
            Sched<[WriteVIMergeV_WorstCase, ReadVIMergeV_WorstCase,
@@ -543,15 +530,11 @@ multiclass VALUm_IV_V_X<string opcodestr, bits<6> funct6> {
                   ReadVICALUX_WorstCase, ReadVMask]>;
 }
 
-multiclass VALUNoVm_IV_V_X_I<string opcodestr, bits<6> funct6> {
-  def V : VALUVVNoVm<funct6, OPIVV, opcodestr # ".vv">,
-          Sched<[WriteVICALUV_WorstCase, ReadVICALUV_WorstCase,
-                 ReadVICALUV_WorstCase]>;
-  def X : VALUVXNoVm<funct6, OPIVX, opcodestr # ".vx">,
-          Sched<[WriteVICALUX_WorstCase, ReadVICALUV_WorstCase,
-                 ReadVICALUX_WorstCase]>;
-  def I : VALUVINoVm<funct6, opcodestr # ".vi", simm5>,
-          Sched<[WriteVICALUI_WorstCase, ReadVICALUV_WorstCase]>;
+multiclass VALUm_IV_V_X_I<string opcodestr, bits<6> funct6>
+    : VALUm_IV_V_X<opcodestr, funct6> {
+  def IM : VALUmVI<funct6, opcodestr # ".vim">,
+           Sched<[WriteVICALUI_WorstCase, ReadVICALUV_WorstCase,
+                  ReadVMask]>;
 }
 
 multiclass VALUNoVm_IV_V_X<string opcodestr, bits<6> funct6> {
@@ -563,13 +546,10 @@ multiclass VALUNoVm_IV_V_X<string opcodestr, bits<6> funct6> {
                  ReadVICALUX_WorstCase]>;
 }
 
-multiclass VALU_FV_V_F<string opcodestr, bits<6> funct6> {
-  def V : VALUVV<funct6, OPFVV, opcodestr # ".vv">,
-          Sched<[WriteVFALUV_WorstCase, ReadVFALUV_WorstCase,
-                 ReadVFALUV_WorstCase, ReadVMask]>;
-  def F : VALUVF<funct6, OPFVF, opcodestr # ".vf">,
-          Sched<[WriteVFALUF_WorstCase, ReadVFALUV_WorstCase,
-                 ReadVFALUF_WorstCase, ReadVMask]>;
+multiclass VALUNoVm_IV_V_X_I<string opcodestr, bits<6> funct6>
+   : VALUNoVm_IV_V_X<opcodestr, funct6> {
+  def I : VALUVINoVm<funct6, opcodestr # ".vi", simm5>,
+          Sched<[WriteVICALUI_WorstCase, ReadVICALUV_WorstCase]>;
 }
 
 multiclass VALU_FV_F<string opcodestr, bits<6> funct6> {
@@ -578,6 +558,13 @@ multiclass VALU_FV_F<string opcodestr, bits<6> funct6> {
                  ReadVFALUF_WorstCase, ReadVMask]>;
 }
 
+multiclass VALU_FV_V_F<string opcodestr, bits<6> funct6>
+    : VALU_FV_F<opcodestr, funct6> {
+  def V : VALUVV<funct6, OPFVV, opcodestr # ".vv">,
+          Sched<[WriteVFALUV_WorstCase, ReadVFALUV_WorstCase,
+                 ReadVFALUV_WorstCase, ReadVMask]>;
+}
+
 multiclass VWALU_FV_V_F<string opcodestr, bits<6> funct6, string vw> {
   def V : VALUVV<funct6, OPFVV, opcodestr # "." # vw # "v">,
           Sched<[WriteVFWALUV_WorstCase, ReadVFWALUV_WorstCase,
@@ -596,19 +583,17 @@ multiclass VMUL_FV_V_F<string opcodestr, bits<6> funct6> {
                  ReadVFMulF_WorstCase, ReadVMask]>;
 }
 
-multiclass VDIV_FV_V_F<string opcodestr, bits<6> funct6> {
-  def V : VALUVV<funct6, OPFVV, opcodestr # ".vv">,
-          Sched<[WriteVFDivV_WorstCase, ReadVFDivV_WorstCase,
-                 ReadVFDivV_WorstCase, ReadVMask]>;
+multiclass VDIV_FV_F<string opcodestr, bits<6> funct6> {
   def F : VALUVF<funct6, OPFVF, opcodestr # ".vf">,
           Sched<[WriteVFDivF_WorstCase, ReadVFDivV_WorstCase,
                  ReadVFDivF_WorstCase, ReadVMask]>;
 }
 
-multiclass VRDIV_FV_F<string opcodestr, bits<6> funct6> {
-  def F : VALUVF<funct6, OPFVF, opcodestr # ".vf">,
-          Sched<[WriteVFDivF_WorstCase, ReadVFDivV_WorstCase,
-                 ReadVFDivF_WorstCase, ReadVMask]>;
+multiclass VDIV_FV_V_F<string opcodestr, bits<6> funct6>
+    : VDIV_FV_F<opcodestr, funct6> {
+  def V : VALUVV<funct6, OPFVV, opcodestr # ".vv">,
+          Sched<[WriteVFDivV_WorstCase, ReadVFDivV_WorstCase,
+                 ReadVFDivV_WorstCase, ReadVMask]>;
 }
 
 multiclass VWMUL_FV_V_F<string opcodestr, bits<6> funct6> {
@@ -659,19 +644,17 @@ multiclass VMINMAX_FV_V_F<string opcodestr, bits<6> funct6> {
                  ReadVFMinMaxF_WorstCase, ReadVMask]>;
 }
 
-multiclass VCMP_FV_V_F<string opcodestr, bits<6> funct6> {
-  def V : VALUVV<funct6, OPFVV, opcodestr # ".vv">,
-          Sched<[WriteVFCmpV_WorstCase, ReadVFCmpV_WorstCase,
-                 ReadVFCmpV_WorstCase, ReadVMask]>;
+multiclass VCMP_FV_F<string opcodestr, bits<6> funct6> {
   def F : VALUVF<funct6, OPFVF, opcodestr # ".vf">,
           Sched<[WriteVFCmpF_WorstCase, ReadVFCmpV_WorstCase,
                  ReadVFCmpF_WorstCase, ReadVMask]>;
 }
 
-multiclass VCMP_FV_F<string opcodestr, bits<6> funct6> {
-  def F : VALUVF<funct6, OPFVF, opcodestr # ".vf">,
-          Sched<[WriteVFCmpF_WorstCase, ReadVFCmpV_WorstCase,
-                 ReadVFCmpF_WorstCase, ReadVMask]>;
+multiclass VCMP_FV_V_F<string opcodestr, bits<6> funct6>
+    : VCMP_FV_F<opcodestr, funct6> {
+  def V : VALUVV<funct6, OPFVV, opcodestr # ".vv">,
+          Sched<[WriteVFCmpV_WorstCase, ReadVFCmpV_WorstCase,
+                 ReadVFCmpV_WorstCase, ReadVMask]>;
 }
 
 multiclass VSGNJ_FV_V_F<string opcodestr, bits<6> funct6> {
@@ -822,35 +805,36 @@ multiclass VMINMAX_IV_V_X<string opcodestr, bits<6> funct6> {
                   ReadVIMinMaxX_WorstCase, ReadVMask]>;
 }
 
-multiclass VCMP_IV_V_X_I<string opcodestr, bits<6> funct6> {
+multiclass VCMP_IV_V<string opcodestr, bits<6> funct6> {
   def V  : VALUVV<funct6, OPIVV, opcodestr # ".vv">,
            Sched<[WriteVICmpV_WorstCase, ReadVICmpV_WorstCase,
                   ReadVICmpV_WorstCase, ReadVMask]>;
-  def X  : VALUVX<funct6, OPIVX, opcodestr # ".vx">,
-           Sched<[WriteVICmpX_WorstCase, ReadVICmpV_WorstCase,
-                  ReadVICmpX_WorstCase, ReadVMask]>;
-  def I  : VALUVI<funct6, opcodestr # ".vi", simm5>,
-           Sched<[WriteVICmpI_WorstCase, ReadVICmpV_WorstCase,
-                  ReadVMask]>;
 }
 
-multiclass VCMP_IV_X_I<string opcodestr, bits<6> funct6> {
+multiclass VCMP_IV_X<string opcodestr, bits<6> funct6> {
   def X  : VALUVX<funct6, OPIVX, opcodestr # ".vx">,
            Sched<[WriteVICmpX_WorstCase, ReadVICmpV_WorstCase,
                   ReadVICmpX_WorstCase, ReadVMask]>;
+}
+
+multiclass VCMP_IV_I<string opcodestr, bits<6> funct6> {
   def I  : VALUVI<funct6, opcodestr # ".vi", simm5>,
            Sched<[WriteVICmpI_WorstCase, ReadVICmpV_WorstCase,
                   ReadVMask]>;
 }
 
-multiclass VCMP_IV_V_X<string opcodestr, bits<6> funct6> {
-  def V  : VALUVV<funct6, OPIVV, opcodestr # ".vv">,
-           Sched<[WriteVICmpV_WorstCase, ReadVICmpV_WorstCase,
-                  ReadVICmpV_WorstCase, ReadVMask]>;
-  def X  : VALUVX<funct6, OPIVX, opcodestr # ".vx">,
-           Sched<[WriteVICmpX_WorstCase, ReadVICmpV_WorstCase,
-                  ReadVICmpX_WorstCase, ReadVMask]>;
-}
+multiclass VCMP_IV_V_X_I<string opcodestr, bits<6> funct6>
+    : VCMP_IV_V<opcodestr, funct6>,
+      VCMP_IV_X<opcodestr, funct6>,
+      VCMP_IV_I<opcodestr, funct6>;
+
+multiclass VCMP_IV_X_I<string opcodestr, bits<6> funct6>
+    : VCMP_IV_X<opcodestr, funct6>,
+      VCMP_IV_I<opcodestr, funct6>;
+
+multiclass VCMP_IV_V_X<string opcodestr, bits<6> funct6>
+    : VCMP_IV_V<opcodestr, funct6>,
+      VCMP_IV_X<opcodestr, funct6>;
 
 multiclass VMUL_MV_V_X<string opcodestr, bits<6> funct6> {
   def V  : VALUVV<funct6, OPMVV, opcodestr # ".vv">,
@@ -879,27 +863,22 @@ multiclass VDIV_MV_V_X<string opcodestr, bits<6> funct6> {
                   ReadVIDivX_WorstCase, ReadVMask]>;
 }
 
-multiclass VSALU_IV_V_X_I<string opcodestr, bits<6> funct6> {
+multiclass VSALU_IV_V_X<string opcodestr, bits<6> funct6> {
   def V  : VALUVV<funct6, OPIVV, opcodestr # ".vv">,
            Sched<[WriteVSALUV_WorstCase, ReadVSALUV_WorstCase,
                   ReadVSALUV_WorstCase, ReadVMask]>;
   def X  : VALUVX<funct6, OPIVX, opcodestr # ".vx">,
            Sched<[WriteVSALUX_WorstCase, ReadVSALUV_WorstCase,
                   ReadVSALUX_WorstCase, ReadVMask]>;
+}
+
+multiclass VSALU_IV_V_X_I<string opcodestr, bits<6> funct6>
+    : VSALU_IV_V_X<opcodestr, funct6> {
   def I  : VALUVI<funct6, opcodestr # ".vi", simm5>,
            Sched<[WriteVSALUI_WorstCase, ReadVSALUV_WorstCase,
                   ReadVMask]>;
 }
 
-multiclass VSALU_IV_V_X<string opcodestr, bits<6> funct6> {
-  def V  : VALUVV<funct6, OPIVV, opcodestr # ".vv">,
-           Sched<[WriteVSALUV_WorstCase, ReadVSALUV_WorstCase,
-                  ReadVSALUV_WorstCase, ReadVMask]>;
-  def X  : VALUVX<funct6, OPIVX, opcodestr # ".vx">,
-           Sched<[WriteVSALUX_WorstCase, ReadVSALUV_WorstCase,
-                  ReadVSALUX_WorstCase, ReadVMask]>;
-}
-
 multiclass VAALU_MV_V_X<string opcodestr, bits<6> funct6> {
   def V  : VALUVV<funct6, OPMVV, opcodestr # ".vv">,
            Sched<[WriteVAALUV_WorstCase, ReadVAALUV_WorstCase,
@@ -1360,7 +1339,7 @@ defm VFWSUB_W : VWALU_FV_V_F<"vfwsub", 0b110110, "w">;
 let Uses = [FRM], mayRaiseFPException = true in {
 defm VFMUL_V : VMUL_FV_V_F<"vfmul", 0b100100>;
 defm VFDIV_V : VDIV_FV_V_F<"vfdiv", 0b100000>;
-defm VFRDIV_V : VRDIV_FV_F<"vfrdiv", 0b100001>;
+defm VFRDIV_V : VDIV_FV_F<"vfrdiv", 0b100001>;
 }
 
 // Vector Widening Floating-Point Multiply