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author | Craig Topper <craig.topper@sifive.com> | 2023-08-31 19:26:57 -0700 |
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committer | Craig Topper <craig.topper@sifive.com> | 2023-08-31 19:32:21 -0700 |
commit | 6e42f905ae215fbf0c92b57780b64b274cc7e206 (patch) | |
tree | 009f42490f835061e22f72299fe0f647557d201d | |
parent | c04a05d898982614a2df80d928b97ed4f8c49b60 (diff) | |
download | llvm-6e42f905ae215fbf0c92b57780b64b274cc7e206.zip llvm-6e42f905ae215fbf0c92b57780b64b274cc7e206.tar.gz llvm-6e42f905ae215fbf0c92b57780b64b274cc7e206.tar.bz2 |
[RISCV] Remove AtomicStPat now that atomic_store has the same operand order as store. NFC
Use StPat instead.
-rw-r--r-- | llvm/lib/Target/RISCV/RISCVInstrInfoA.td | 13 |
1 files changed, 4 insertions, 9 deletions
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoA.td b/llvm/lib/Target/RISCV/RISCVInstrInfoA.td index 41f2a37..1c305f1 100644 --- a/llvm/lib/Target/RISCV/RISCVInstrInfoA.td +++ b/llvm/lib/Target/RISCV/RISCVInstrInfoA.td @@ -44,11 +44,6 @@ multiclass AMO_rr_aq_rl<bits<5> funct5, bits<3> funct3, string opcodestr> { def _AQ_RL : AMO_rr<funct5, 1, 1, funct3, opcodestr # ".aqrl">; } -class AtomicStPat<PatFrag StoreOp, RVInst Inst, RegisterClass StTy, - ValueType vt = XLenVT> - : Pat<(StoreOp (vt StTy:$rs2), (AddrRegImm (XLenVT GPR:$rs1), simm12:$imm12)), - (Inst StTy:$rs2, GPR:$rs1, simm12:$imm12)>; - //===----------------------------------------------------------------------===// // Instructions //===----------------------------------------------------------------------===// @@ -122,14 +117,14 @@ let Predicates = [HasAtomicLdSt] in { def : LdPat<atomic_load_16, LH>; def : LdPat<atomic_load_32, LW>; - def : AtomicStPat<atomic_store_8, SB, GPR>; - def : AtomicStPat<atomic_store_16, SH, GPR>; - def : AtomicStPat<atomic_store_32, SW, GPR>; + def : StPat<atomic_store_8, SB, GPR, XLenVT>; + def : StPat<atomic_store_16, SH, GPR, XLenVT>; + def : StPat<atomic_store_32, SW, GPR, XLenVT>; } let Predicates = [HasAtomicLdSt, IsRV64] in { def : LdPat<atomic_load_64, LD, i64>; - def : AtomicStPat<atomic_store_64, SD, GPR, i64>; + def : StPat<atomic_store_64, SD, GPR, i64>; } /// AMOs |