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| author | Thomas Preud'homme <thomas.preudhomme@arm.com> | 2018-07-30 16:45:40 +0000 |
|---|---|---|
| committer | Thomas Preud'homme <thomas.preudhomme@arm.com> | 2018-07-30 16:45:40 +0000 |
| commit | 6c1b0752997a8bf0c3109bcf4101eff24d97c9ce (patch) | |
| tree | 96c998cc25fba0abaa30e1ab724ccf905c449f11 | |
| parent | 7816531f3c7724fb0297110346439397a99ffbcf (diff) | |
| download | llvm-6c1b0752997a8bf0c3109bcf4101eff24d97c9ce.zip llvm-6c1b0752997a8bf0c3109bcf4101eff24d97c9ce.tar.gz llvm-6c1b0752997a8bf0c3109bcf4101eff24d97c9ce.tar.bz2 | |
Fix uninitialized read in ARM's PrintAsmOperand
Summary:
Fix read of uninitialized RC variable in ARM's PrintAsmOperand when
hasRegClassConstraint returns false. This was causing
inline-asm-operand-implicit-cast test to fail in r338206.
Reviewers: t.p.northover, weimingz, javed.absar, chill
Reviewed By: chill
Subscribers: chill, eraman, kristof.beyls, chrib, llvm-commits
Differential Revision: https://reviews.llvm.org/D49984
llvm-svn: 338268
| -rw-r--r-- | llvm/lib/Target/ARM/ARMAsmPrinter.cpp | 5 | ||||
| -rw-r--r-- | llvm/test/CodeGen/ARM/inlineasm-64bit.ll | 8 |
2 files changed, 11 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMAsmPrinter.cpp b/llvm/lib/Target/ARM/ARMAsmPrinter.cpp index 2196f9b..19d483ef 100644 --- a/llvm/lib/Target/ARM/ARMAsmPrinter.cpp +++ b/llvm/lib/Target/ARM/ARMAsmPrinter.cpp @@ -367,8 +367,9 @@ bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, unsigned NumVals = InlineAsm::getNumOperandRegisters(Flags); unsigned RC; - InlineAsm::hasRegClassConstraint(Flags, RC); - if (RC == ARM::GPRPairRegClassID) { + const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo(); + if (InlineAsm::hasRegClassConstraint(Flags, RC) && + ARM::GPRPairRegClass.hasSubClassEq(TRI->getRegClass(RC))) { if (NumVals != 1) return true; const MachineOperand &MO = MI->getOperand(OpNum); diff --git a/llvm/test/CodeGen/ARM/inlineasm-64bit.ll b/llvm/test/CodeGen/ARM/inlineasm-64bit.ll index 8e747c5..62c71ab 100644 --- a/llvm/test/CodeGen/ARM/inlineasm-64bit.ll +++ b/llvm/test/CodeGen/ARM/inlineasm-64bit.ll @@ -104,3 +104,11 @@ define i64 @tied_64bit_lookback_test(i64 %in) nounwind { %res = extractvalue {i64, i32, i64} %vars, 2 ret i64 %res } + +; Check access to low and high part with a specific register pair constraint +define i64 @low_high_specific_reg_pair(i64 %in) nounwind { +; CHECK-LABEL: low_high_specific_reg_pair +; CHECK: mov r3, r2 + %res = call i64 asm "mov ${0:R}, ${1:Q}", "=&{r2},0"(i64 %in) + ret i64 %res +} |