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| author | Jay Foad <jay.foad@amd.com> | 2022-03-01 11:12:00 +0000 |
|---|---|---|
| committer | Jay Foad <jay.foad@amd.com> | 2022-03-01 14:48:25 +0000 |
| commit | 68895098d11f5c20969f3e14b5c11633399ee19e (patch) | |
| tree | 15afb95a7c91a111a0f0eab4914a0c216d18c6a2 | |
| parent | a968bee093ecb11c556167b6d72256516222f33f (diff) | |
| download | llvm-68895098d11f5c20969f3e14b5c11633399ee19e.zip llvm-68895098d11f5c20969f3e14b5c11633399ee19e.tar.gz llvm-68895098d11f5c20969f3e14b5c11633399ee19e.tar.bz2 | |
[AMDGPU] Preserve src2_modifiers in convertToThreeAddress
Found by code inspection. I don't think it makes a difference with
current codegen, because if any source modifiers were present we
would have selected mad/fma instead of mac/fmac in the first place.
Differential Revision: https://reviews.llvm.org/D120709
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 6 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/twoaddr-fma.mir | 3 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/twoaddr-mad.mir | 3 |
3 files changed, 6 insertions, 6 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp index 8dea17b..dd69fd3 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp @@ -3289,10 +3289,12 @@ MachineInstr *SIInstrInfo::convertToThreeAddress(MachineInstr &MI, const MachineOperand *Src1Mods = getNamedOperand(MI, AMDGPU::OpName::src1_modifiers); const MachineOperand *Src2 = getNamedOperand(MI, AMDGPU::OpName::src2); + const MachineOperand *Src2Mods = + getNamedOperand(MI, AMDGPU::OpName::src2_modifiers); const MachineOperand *Clamp = getNamedOperand(MI, AMDGPU::OpName::clamp); const MachineOperand *Omod = getNamedOperand(MI, AMDGPU::OpName::omod); - if (!Src0Mods && !Src1Mods && !Clamp && !Omod && !IsF64 && + if (!Src0Mods && !Src1Mods && !Src2Mods && !Clamp && !Omod && !IsF64 && // If we have an SGPR input, we will violate the constant bus restriction. (ST.getConstantBusLimit(Opc) > 1 || !Src0->isReg() || !RI.isSGPRReg(MBB.getParent()->getRegInfo(), Src0->getReg()))) { @@ -3375,7 +3377,7 @@ MachineInstr *SIInstrInfo::convertToThreeAddress(MachineInstr &MI, .add(*Src0) .addImm(Src1Mods ? Src1Mods->getImm() : 0) .add(*Src1) - .addImm(0) // Src mods + .addImm(Src2Mods ? Src2Mods->getImm() : 0) .add(*Src2) .addImm(Clamp ? Clamp->getImm() : 0) .addImm(Omod ? Omod->getImm() : 0); diff --git a/llvm/test/CodeGen/AMDGPU/twoaddr-fma.mir b/llvm/test/CodeGen/AMDGPU/twoaddr-fma.mir index cfa4f6d..efe21ed 100644 --- a/llvm/test/CodeGen/AMDGPU/twoaddr-fma.mir +++ b/llvm/test/CodeGen/AMDGPU/twoaddr-fma.mir @@ -297,9 +297,8 @@ body: | %3:vgpr_32 = V_FMAC_F32_e64 0, %0, 1, %1, 0, %2, 0, 0, implicit $mode, implicit $exec ... -# FIXME: Preserve src2_modifiers # GCN-LABEL: name: test_fma_src2mods -# GCN: %3:vgpr_32 = V_FMA_F32_e64 0, %0, 0, %1, 0, %2, 0, 0, implicit $mode, implicit $exec +# GCN: %3:vgpr_32 = V_FMA_F32_e64 0, %0, 0, %1, 1, %2, 0, 0, implicit $mode, implicit $exec --- name: test_fma_src2mods body: | diff --git a/llvm/test/CodeGen/AMDGPU/twoaddr-mad.mir b/llvm/test/CodeGen/AMDGPU/twoaddr-mad.mir index 68340c4..cb7d403 100644 --- a/llvm/test/CodeGen/AMDGPU/twoaddr-mad.mir +++ b/llvm/test/CodeGen/AMDGPU/twoaddr-mad.mir @@ -232,9 +232,8 @@ body: | %3:vgpr_32 = V_MAC_F32_e64 0, %0, 1, %1, 0, %2, 0, 0, implicit $mode, implicit $exec ... -# FIXME: Preserve src2_modifiers # GCN-LABEL: name: test_mad_src2mods -# GCN: %3:vgpr_32 = V_MAD_F32_e64 0, %0, 0, %1, 0, %2, 0, 0, implicit $mode, implicit $exec +# GCN: %3:vgpr_32 = V_MAD_F32_e64 0, %0, 0, %1, 1, %2, 0, 0, implicit $mode, implicit $exec --- name: test_mad_src2mods body: | |