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author | Nikita Popov <npopov@redhat.com> | 2023-01-05 12:19:16 +0100 |
---|---|---|
committer | Nikita Popov <npopov@redhat.com> | 2023-01-05 12:25:31 +0100 |
commit | 569d6573218712d00e0072ab5cdab7ea6dd70ecc (patch) | |
tree | 258cf973dc1f27ce1a54a1fef03ae3abdb136c30 | |
parent | e449e1dff9f83e45c1a290214e9f49b2c562b343 (diff) | |
download | llvm-569d6573218712d00e0072ab5cdab7ea6dd70ecc.zip llvm-569d6573218712d00e0072ab5cdab7ea6dd70ecc.tar.gz llvm-569d6573218712d00e0072ab5cdab7ea6dd70ecc.tar.bz2 |
[UpdateTestChecks] Convert tests to opaque pointers (NFC)
12 files changed, 342 insertions, 372 deletions
diff --git a/llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/x86-loopvectorize-costmodel.ll b/llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/x86-loopvectorize-costmodel.ll index 29bc47a..18d8191 100644 --- a/llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/x86-loopvectorize-costmodel.ll +++ b/llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/x86-loopvectorize-costmodel.ll @@ -18,18 +18,18 @@ for.body: %iv.0 = add nuw nsw i64 %iv, 0 %iv.1 = add nuw nsw i64 %iv, 1 - %in0 = getelementptr inbounds [1024 x float], [1024 x float]* @A, i64 0, i64 %iv.0 - %in1 = getelementptr inbounds [1024 x float], [1024 x float]* @A, i64 0, i64 %iv.1 + %in0 = getelementptr inbounds [1024 x float], ptr @A, i64 0, i64 %iv.0 + %in1 = getelementptr inbounds [1024 x float], ptr @A, i64 0, i64 %iv.1 - %v0 = load float, float* %in0 - %v1 = load float, float* %in1 + %v0 = load float, ptr %in0 + %v1 = load float, ptr %in1 %reduce.add.0 = fadd float %v0, %v1 %reduce.add.0.narrow = fptoui float %reduce.add.0 to i8 - %out = getelementptr inbounds [1024 x i8], [1024 x i8]* @B, i64 0, i64 %iv.0 - store i8 %reduce.add.0.narrow, i8* %out + %out = getelementptr inbounds [1024 x i8], ptr @B, i64 0, i64 %iv.0 + store i8 %reduce.add.0.narrow, ptr %out %iv.next = add nuw nsw i64 %iv.0, 2 %cmp = icmp ult i64 %iv.next, 1024 diff --git a/llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/x86-loopvectorize-costmodel.ll.expected b/llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/x86-loopvectorize-costmodel.ll.expected index cc9145b..e862bf8 100644 --- a/llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/x86-loopvectorize-costmodel.ll.expected +++ b/llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/x86-loopvectorize-costmodel.ll.expected @@ -1,4 +1,4 @@ -; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --filter "LV: Found an estimated cost of [0-9]+ for VF [0-9]+ For instruction:\s*%v0 = load float, float\* %in0, align 4" +; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --filter "LV: Found an estimated cost of [0-9]+ for VF [0-9]+ For instruction:\s*%v0 = load float, ptr %in0, align 4" --filter "LV: Found an estimated cost of [0-9]+ for VF [0-9]+ For instruction:\s*%v0 = load float, float\* %in0, align 4" ; RUN: opt -passes=loop-vectorize -vectorizer-maximize-bandwidth -S -mattr=+avx512bw --debug-only=loop-vectorize < %s 2>&1 | FileCheck %s --check-prefixes=CHECK,AVX512 ; REQUIRES: asserts @@ -10,13 +10,13 @@ target triple = "x86_64-unknown-linux-gnu" define void @test() { ; CHECK-LABEL: 'test' -; CHECK: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load float, float* %in0, align 4 -; CHECK: LV: Found an estimated cost of 3 for VF 2 For instruction: %v0 = load float, float* %in0, align 4 -; CHECK: LV: Found an estimated cost of 3 for VF 4 For instruction: %v0 = load float, float* %in0, align 4 -; CHECK: LV: Found an estimated cost of 3 for VF 8 For instruction: %v0 = load float, float* %in0, align 4 -; CHECK: LV: Found an estimated cost of 5 for VF 16 For instruction: %v0 = load float, float* %in0, align 4 -; CHECK: LV: Found an estimated cost of 22 for VF 32 For instruction: %v0 = load float, float* %in0, align 4 -; CHECK: LV: Found an estimated cost of 92 for VF 64 For instruction: %v0 = load float, float* %in0, align 4 +; CHECK: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load float, ptr %in0, align 4 +; CHECK: LV: Found an estimated cost of 3 for VF 2 For instruction: %v0 = load float, ptr %in0, align 4 +; CHECK: LV: Found an estimated cost of 3 for VF 4 For instruction: %v0 = load float, ptr %in0, align 4 +; CHECK: LV: Found an estimated cost of 3 for VF 8 For instruction: %v0 = load float, ptr %in0, align 4 +; CHECK: LV: Found an estimated cost of 5 for VF 16 For instruction: %v0 = load float, ptr %in0, align 4 +; CHECK: LV: Found an estimated cost of 22 for VF 32 For instruction: %v0 = load float, ptr %in0, align 4 +; CHECK: LV: Found an estimated cost of 92 for VF 64 For instruction: %v0 = load float, ptr %in0, align 4 ; entry: br label %for.body @@ -27,18 +27,18 @@ for.body: %iv.0 = add nuw nsw i64 %iv, 0 %iv.1 = add nuw nsw i64 %iv, 1 - %in0 = getelementptr inbounds [1024 x float], [1024 x float]* @A, i64 0, i64 %iv.0 - %in1 = getelementptr inbounds [1024 x float], [1024 x float]* @A, i64 0, i64 %iv.1 + %in0 = getelementptr inbounds [1024 x float], ptr @A, i64 0, i64 %iv.0 + %in1 = getelementptr inbounds [1024 x float], ptr @A, i64 0, i64 %iv.1 - %v0 = load float, float* %in0 - %v1 = load float, float* %in1 + %v0 = load float, ptr %in0 + %v1 = load float, ptr %in1 %reduce.add.0 = fadd float %v0, %v1 %reduce.add.0.narrow = fptoui float %reduce.add.0 to i8 - %out = getelementptr inbounds [1024 x i8], [1024 x i8]* @B, i64 0, i64 %iv.0 - store i8 %reduce.add.0.narrow, i8* %out + %out = getelementptr inbounds [1024 x i8], ptr @B, i64 0, i64 %iv.0 + store i8 %reduce.add.0.narrow, ptr %out %iv.next = add nuw nsw i64 %iv.0, 2 %cmp = icmp ult i64 %iv.next, 1024 diff --git a/llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/loopvectorize-costmodel.test b/llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/loopvectorize-costmodel.test index b9f85f7..35bcf6c 100644 --- a/llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/loopvectorize-costmodel.test +++ b/llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/loopvectorize-costmodel.test @@ -1,11 +1,11 @@ # REQUIRES: x86-registered-target, asserts ## Check that --filter works properly. -# RUN: cp -f %S/Inputs/x86-loopvectorize-costmodel.ll %t.ll && %update_analyze_test_checks --filter "LV: Found an estimated cost of [0-9]+ for VF [0-9]+ For instruction:\s*%v0 = load float, float\* %in0, align 4" %t.ll +# RUN: cp -f %S/Inputs/x86-loopvectorize-costmodel.ll %t.ll && %update_analyze_test_checks --filter "LV: Found an estimated cost of [0-9]+ for VF [0-9]+ For instruction:\s*%v0 = load float, ptr %in0, align 4" %t.ll # RUN: diff -u %t.ll %S/Inputs/x86-loopvectorize-costmodel.ll.expected ## Check that running the script again does not change the result: -# RUN: %update_analyze_test_checks --filter "LV: Found an estimated cost of [0-9]+ for VF [0-9]+ For instruction:\s*%v0 = load float, float\* %in0, align 4" %t.ll +# RUN: %update_analyze_test_checks --filter "LV: Found an estimated cost of [0-9]+ for VF [0-9]+ For instruction:\s*%v0 = load float, ptr %in0, align 4" %t.ll # RUN: diff -u %t.ll %S/Inputs/x86-loopvectorize-costmodel.ll.expected ## Check that running the script again, without arguments, does not change the result: diff --git a/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/check_attrs.ll b/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/check_attrs.ll index 8ff6b8c..90f439a 100644 --- a/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/check_attrs.ll +++ b/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/check_attrs.ll @@ -4,8 +4,8 @@ %struct.RT = type { i8, [10 x [20 x i32]], i8 } %struct.ST = type { i32, double, %struct.RT } -define i32* @foo(%struct.ST* %s) nounwind uwtable readnone optsize ssp { +define ptr @foo(ptr %s) nounwind uwtable readnone optsize ssp { entry: - %arrayidx = getelementptr inbounds %struct.ST, %struct.ST* %s, i64 1, i32 2, i32 1, i64 5, i64 13 - ret i32* %arrayidx + %arrayidx = getelementptr inbounds %struct.ST, ptr %s, i64 1, i32 2, i32 1, i64 5, i64 13 + ret ptr %arrayidx } diff --git a/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/check_attrs.ll.funcattrs.expected b/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/check_attrs.ll.funcattrs.expected index 8ad8696..b298c80 100644 --- a/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/check_attrs.ll.funcattrs.expected +++ b/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/check_attrs.ll.funcattrs.expected @@ -5,17 +5,17 @@ %struct.RT = type { i8, [10 x [20 x i32]], i8 } %struct.ST = type { i32, double, %struct.RT } -define i32* @foo(%struct.ST* %s) nounwind uwtable readnone optsize ssp { +define ptr @foo(ptr %s) nounwind uwtable readnone optsize ssp { ; CHECK: Function Attrs: nofree norecurse nosync nounwind optsize ssp willreturn memory(none) uwtable ; CHECK-LABEL: define {{[^@]+}}@foo -; CHECK-SAME: (%struct.ST* nofree readnone [[S:%.*]]) #[[ATTR0:[0-9]+]] { +; CHECK-SAME: (ptr nofree readnone [[S:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-NEXT: entry: -; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.ST* [[S]], i64 1, i32 2, i32 1, i64 5, i64 13 -; CHECK-NEXT: ret i32* [[ARRAYIDX]] +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], ptr [[S]], i64 1, i32 2, i32 1, i64 5, i64 13 +; CHECK-NEXT: ret ptr [[ARRAYIDX]] ; entry: - %arrayidx = getelementptr inbounds %struct.ST, %struct.ST* %s, i64 1, i32 2, i32 1, i64 5, i64 13 - ret i32* %arrayidx + %arrayidx = getelementptr inbounds %struct.ST, ptr %s, i64 1, i32 2, i32 1, i64 5, i64 13 + ret ptr %arrayidx } ;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: ; IS__CGSCC____: {{.*}} diff --git a/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/check_attrs.ll.plain.expected b/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/check_attrs.ll.plain.expected index 1ab1dcbc..d20f45c 100644 --- a/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/check_attrs.ll.plain.expected +++ b/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/check_attrs.ll.plain.expected @@ -5,16 +5,16 @@ %struct.RT = type { i8, [10 x [20 x i32]], i8 } %struct.ST = type { i32, double, %struct.RT } -define i32* @foo(%struct.ST* %s) nounwind uwtable readnone optsize ssp { +define ptr @foo(ptr %s) nounwind uwtable readnone optsize ssp { ; CHECK-LABEL: define {{[^@]+}}@foo -; CHECK-SAME: (%struct.ST* nofree readnone [[S:%.*]]) #[[ATTR0:[0-9]+]] { +; CHECK-SAME: (ptr nofree readnone [[S:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-NEXT: entry: -; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.ST* [[S]], i64 1, i32 2, i32 1, i64 5, i64 13 -; CHECK-NEXT: ret i32* [[ARRAYIDX]] +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], ptr [[S]], i64 1, i32 2, i32 1, i64 5, i64 13 +; CHECK-NEXT: ret ptr [[ARRAYIDX]] ; entry: - %arrayidx = getelementptr inbounds %struct.ST, %struct.ST* %s, i64 1, i32 2, i32 1, i64 5, i64 13 - ret i32* %arrayidx + %arrayidx = getelementptr inbounds %struct.ST, ptr %s, i64 1, i32 2, i32 1, i64 5, i64 13 + ret ptr %arrayidx } ;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: ; IS__CGSCC____: {{.*}} diff --git a/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/pre-process.ll b/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/pre-process.ll index 9d67631..7c7836b 100644 --- a/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/pre-process.ll +++ b/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/pre-process.ll @@ -11,8 +11,7 @@ target datalayout = "e-m:e-p200:128:128:128:64-p:64:64-A200-P200-G200" -define i8 addrspace(200)* @test_zerogep_in_different_as(i8 addrspace(200)* %arg) addrspace(200) nounwind { +define ptr addrspace(200) @test_zerogep_in_different_as(ptr addrspace(200) %arg) addrspace(200) nounwind { entry: - %ret = getelementptr inbounds i8, i8 addrspace(200)* %arg, i64 0 - ret i8 addrspace(200)* %ret + ret ptr addrspace(200) %arg } diff --git a/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/pre-process.ll.expected b/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/pre-process.ll.expected index 5153421..4f5614d 100644 --- a/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/pre-process.ll.expected +++ b/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/pre-process.ll.expected @@ -12,28 +12,27 @@ target datalayout = "e-m:e-p200:128:128:128:64-p:64:64-A200-P200-G200" -define i8 addrspace(200)* @test_zerogep_in_different_as(i8 addrspace(200)* %arg) addrspace(200) nounwind { +define ptr addrspace(200) @test_zerogep_in_different_as(ptr addrspace(200) %arg) addrspace(200) nounwind { ; CHECK-AS200-LABEL: define {{[^@]+}}@test_zerogep_in_different_as -; CHECK-AS200-SAME: (i8 addrspace(200)* [[ARG:%.*]]) addrspace(200) #[[ATTR0:[0-9]+]] { +; CHECK-AS200-SAME: (ptr addrspace(200) [[ARG:%.*]]) addrspace(200) #[[ATTR0:[0-9]+]] { ; CHECK-AS200-NEXT: entry: -; CHECK-AS200-NEXT: ret i8 addrspace(200)* [[ARG]] +; CHECK-AS200-NEXT: ret ptr addrspace(200) [[ARG]] ; ; CHECK-AS0-LABEL: define {{[^@]+}}@test_zerogep_in_different_as -; CHECK-AS0-SAME: (i8* [[ARG:%.*]]) #[[ATTR0:[0-9]+]] { +; CHECK-AS0-SAME: (ptr [[ARG:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-AS0-NEXT: entry: -; CHECK-AS0-NEXT: ret i8* [[ARG]] +; CHECK-AS0-NEXT: ret ptr [[ARG]] ; ; CHECK-AS1-LABEL: define {{[^@]+}}@test_zerogep_in_different_as -; CHECK-AS1-SAME: (i8 addrspace(1)* [[ARG:%.*]]) addrspace(1) #[[ATTR0:[0-9]+]] { +; CHECK-AS1-SAME: (ptr addrspace(1) [[ARG:%.*]]) addrspace(1) #[[ATTR0:[0-9]+]] { ; CHECK-AS1-NEXT: entry: -; CHECK-AS1-NEXT: ret i8 addrspace(1)* [[ARG]] +; CHECK-AS1-NEXT: ret ptr addrspace(1) [[ARG]] ; ; CHECK-AS200-NOOP-PRE-PROCESS-LABEL: define {{[^@]+}}@test_zerogep_in_different_as -; CHECK-AS200-NOOP-PRE-PROCESS-SAME: (i8 addrspace(200)* [[ARG:%.*]]) addrspace(200) #[[ATTR0:[0-9]+]] { +; CHECK-AS200-NOOP-PRE-PROCESS-SAME: (ptr addrspace(200) [[ARG:%.*]]) addrspace(200) #[[ATTR0:[0-9]+]] { ; CHECK-AS200-NOOP-PRE-PROCESS-NEXT: entry: -; CHECK-AS200-NOOP-PRE-PROCESS-NEXT: ret i8 addrspace(200)* [[ARG]] +; CHECK-AS200-NOOP-PRE-PROCESS-NEXT: ret ptr addrspace(200) [[ARG]] ; entry: - %ret = getelementptr inbounds i8, i8 addrspace(200)* %arg, i64 0 - ret i8 addrspace(200)* %ret + ret ptr addrspace(200) %arg } diff --git a/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll b/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll index bc6988c..60ad558 100644 --- a/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll +++ b/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll @@ -7,43 +7,41 @@ target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16 target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: nounwind uwtable -define dso_local void @foo(i32* %A) #0 !dbg !7 { +define dso_local void @foo(ptr %A) #0 !dbg !7 { entry: - %A.addr = alloca i32*, align 8, !DIAssignID !62 + %A.addr = alloca ptr, align 8, !DIAssignID !62 %i = alloca i32, align 4 - call void @llvm.dbg.assign(metadata i1 undef, metadata !13, metadata !DIExpression(), metadata !62, metadata i32** %A.addr, metadata !DIExpression()), !dbg !20 - store i32* %A, i32** %A.addr, align 8, !tbaa !16 - call void @llvm.dbg.declare(metadata i32** %A.addr, metadata !13, metadata !DIExpression()), !dbg !20 - %0 = bitcast i32* %i to i8*, !dbg !21 - call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #3, !dbg !21 - call void @llvm.dbg.declare(metadata i32* %i, metadata !14, metadata !DIExpression()), !dbg !22 - store i32 0, i32* %i, align 4, !dbg !22, !tbaa !23 + call void @llvm.dbg.assign(metadata i1 undef, metadata !13, metadata !DIExpression(), metadata !62, metadata ptr %A.addr, metadata !DIExpression()), !dbg !20 + store ptr %A, ptr %A.addr, align 8, !tbaa !16 + call void @llvm.dbg.declare(metadata ptr %A.addr, metadata !13, metadata !DIExpression()), !dbg !20 + call void @llvm.lifetime.start.p0(i64 4, ptr %i) #3, !dbg !21 + call void @llvm.dbg.declare(metadata ptr %i, metadata !14, metadata !DIExpression()), !dbg !22 + store i32 0, ptr %i, align 4, !dbg !22, !tbaa !23 br label %for.cond, !dbg !21 for.cond: ; preds = %for.inc, %entry - %1 = load i32, i32* %i, align 4, !dbg !25, !tbaa !23 - %2 = load i32*, i32** %A.addr, align 8, !dbg !27, !tbaa !16 - %3 = load i32, i32* %2, align 4, !dbg !28, !tbaa !23 - %cmp = icmp slt i32 %1, %3, !dbg !29 + %0 = load i32, ptr %i, align 4, !dbg !25, !tbaa !23 + %1 = load ptr, ptr %A.addr, align 8, !dbg !27, !tbaa !16 + %2 = load i32, ptr %1, align 4, !dbg !28, !tbaa !23 + %cmp = icmp slt i32 %0, %2, !dbg !29 br i1 %cmp, label %for.body, label %for.cond.cleanup, !dbg !30, !prof !61 for.cond.cleanup: ; preds = %for.cond - %4 = bitcast i32* %i to i8*, !dbg !31 - call void @llvm.lifetime.end.p0i8(i64 4, i8* %4) #3, !dbg !31 + call void @llvm.lifetime.end.p0(i64 4, ptr %i) #3, !dbg !31 br label %for.end for.body: ; preds = %for.cond - %5 = load i32*, i32** %A.addr, align 8, !dbg !32, !tbaa !16 - %6 = load i32, i32* %i, align 4, !dbg !33, !tbaa !23 - %idxprom = sext i32 %6 to i64, !dbg !32 - %arrayidx = getelementptr inbounds i32, i32* %5, i64 %idxprom, !dbg !32 - store i32 0, i32* %arrayidx, align 4, !dbg !34, !tbaa !23 + %3 = load ptr, ptr %A.addr, align 8, !dbg !32, !tbaa !16 + %4 = load i32, ptr %i, align 4, !dbg !33, !tbaa !23 + %idxprom = sext i32 %4 to i64, !dbg !32 + %arrayidx = getelementptr inbounds i32, ptr %3, i64 %idxprom, !dbg !32 + store i32 0, ptr %arrayidx, align 4, !dbg !34, !tbaa !23 br label %for.inc, !dbg !32 for.inc: ; preds = %for.body - %7 = load i32, i32* %i, align 4, !dbg !35, !tbaa !23 - %inc = add nsw i32 %7, 1, !dbg !35 - store i32 %inc, i32* %i, align 4, !dbg !35, !tbaa !23 + %5 = load i32, ptr %i, align 4, !dbg !35, !tbaa !23 + %inc = add nsw i32 %5, 1, !dbg !35 + store i32 %inc, ptr %i, align 4, !dbg !35, !tbaa !23 br label %for.cond, !dbg !31, !llvm.loop !36 for.end: ; preds = %for.cond.cleanup @@ -54,48 +52,46 @@ for.end: ; preds = %for.cond.cleanup declare void @llvm.dbg.declare(metadata, metadata, metadata) #1 ; Function Attrs: argmemonly nounwind willreturn -declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #2 +declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2 ; Function Attrs: argmemonly nounwind willreturn -declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #2 +declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2 ; Function Attrs: nounwind uwtable -define dso_local void @bar(i32* %A) #0 !dbg !39 { +define dso_local void @bar(ptr %A) #0 !dbg !39 { entry: - %A.addr = alloca i32*, align 8 + %A.addr = alloca ptr, align 8 %i = alloca i32, align 4 - store i32* %A, i32** %A.addr, align 8, !tbaa !16 - call void @llvm.dbg.declare(metadata i32** %A.addr, metadata !41, metadata !DIExpression()), !dbg !44 - %0 = bitcast i32* %i to i8*, !dbg !45 - call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #3, !dbg !45 - call void @llvm.dbg.declare(metadata i32* %i, metadata !42, metadata !DIExpression()), !dbg !46 - store i32 0, i32* %i, align 4, !dbg !46, !tbaa !23 + store ptr %A, ptr %A.addr, align 8, !tbaa !16 + call void @llvm.dbg.declare(metadata ptr %A.addr, metadata !41, metadata !DIExpression()), !dbg !44 + call void @llvm.lifetime.start.p0(i64 4, ptr %i) #3, !dbg !45 + call void @llvm.dbg.declare(metadata ptr %i, metadata !42, metadata !DIExpression()), !dbg !46 + store i32 0, ptr %i, align 4, !dbg !46, !tbaa !23 br label %for.cond, !dbg !45 for.cond: ; preds = %for.inc, %entry - %1 = load i32, i32* %i, align 4, !dbg !47, !tbaa !23 - %2 = load i32*, i32** %A.addr, align 8, !dbg !49, !tbaa !16 - %3 = load i32, i32* %2, align 4, !dbg !50, !tbaa !23 - %cmp = icmp slt i32 %1, %3, !dbg !51 + %0 = load i32, ptr %i, align 4, !dbg !47, !tbaa !23 + %1 = load ptr, ptr %A.addr, align 8, !dbg !49, !tbaa !16 + %2 = load i32, ptr %1, align 4, !dbg !50, !tbaa !23 + %cmp = icmp slt i32 %0, %2, !dbg !51 br i1 %cmp, label %for.body, label %for.cond.cleanup, !dbg !52 for.cond.cleanup: ; preds = %for.cond - %4 = bitcast i32* %i to i8*, !dbg !53 - call void @llvm.lifetime.end.p0i8(i64 4, i8* %4) #3, !dbg !53 + call void @llvm.lifetime.end.p0(i64 4, ptr %i) #3, !dbg !53 br label %for.end for.body: ; preds = %for.cond - %5 = load i32*, i32** %A.addr, align 8, !dbg !54, !tbaa !16 - %6 = load i32, i32* %i, align 4, !dbg !55, !tbaa !23 - %idxprom = sext i32 %6 to i64, !dbg !54 - %arrayidx = getelementptr inbounds i32, i32* %5, i64 %idxprom, !dbg !54 - store i32 0, i32* %arrayidx, align 4, !dbg !56, !tbaa !23 + %3 = load ptr, ptr %A.addr, align 8, !dbg !54, !tbaa !16 + %4 = load i32, ptr %i, align 4, !dbg !55, !tbaa !23 + %idxprom = sext i32 %4 to i64, !dbg !54 + %arrayidx = getelementptr inbounds i32, ptr %3, i64 %idxprom, !dbg !54 + store i32 0, ptr %arrayidx, align 4, !dbg !56, !tbaa !23 br label %for.inc, !dbg !54 for.inc: ; preds = %for.body - %7 = load i32, i32* %i, align 4, !dbg !57, !tbaa !23 - %inc = add nsw i32 %7, 1, !dbg !57 - store i32 %inc, i32* %i, align 4, !dbg !57, !tbaa !23 + %5 = load i32, ptr %i, align 4, !dbg !57, !tbaa !23 + %inc = add nsw i32 %5, 1, !dbg !57 + store i32 %inc, ptr %i, align 4, !dbg !57, !tbaa !23 br label %for.cond, !dbg !53, !llvm.loop !58 for.end: ; preds = %for.cond.cleanup diff --git a/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.expected b/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.expected index bdc5754..1ecb8b5 100644 --- a/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.expected +++ b/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.expected @@ -8,80 +8,76 @@ target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16 target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: nounwind uwtable -define dso_local void @foo(i32* %A) #0 !dbg !7 { +define dso_local void @foo(ptr %A) #0 !dbg !7 { ; CHECK-LABEL: @foo( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8, !DIAssignID [[DIASSIGNID16:![0-9]+]] +; CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8, !DIAssignID [[DIASSIGNID16:![0-9]+]] ; CHECK-NEXT: [[I:%.*]] = alloca i32, align 4 -; CHECK-NEXT: call void @llvm.dbg.assign(metadata i1 undef, metadata [[META13:![0-9]+]], metadata !DIExpression(), metadata [[DIASSIGNID16]], metadata i32** [[A_ADDR]], metadata !DIExpression()), !dbg [[DBG17:![0-9]+]] -; CHECK-NEXT: store i32* [[A:%.*]], i32** [[A_ADDR]], align 8, !tbaa [[TBAA18:![0-9]+]] -; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32** [[A_ADDR]], metadata [[META13]], metadata !DIExpression()), !dbg [[DBG17]] -; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG22:![0-9]+]] -; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP0]]) #[[ATTR3:[0-9]+]], !dbg [[DBG22]] -; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32* [[I]], metadata [[META14:![0-9]+]], metadata !DIExpression()), !dbg [[DBG23:![0-9]+]] -; CHECK-NEXT: store i32 0, i32* [[I]], align 4, !dbg [[DBG23]], !tbaa [[TBAA24:![0-9]+]] +; CHECK-NEXT: call void @llvm.dbg.assign(metadata i1 undef, metadata [[META13:![0-9]+]], metadata !DIExpression(), metadata [[DIASSIGNID16]], metadata ptr [[A_ADDR]], metadata !DIExpression()), !dbg [[DBG17:![0-9]+]] +; CHECK-NEXT: store ptr [[A:%.*]], ptr [[A_ADDR]], align 8, !tbaa [[TBAA18:![0-9]+]] +; CHECK-NEXT: call void @llvm.dbg.declare(metadata ptr [[A_ADDR]], metadata [[META13]], metadata !DIExpression()), !dbg [[DBG17]] +; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr [[I]]) #[[ATTR3:[0-9]+]], !dbg [[DBG22:![0-9]+]] +; CHECK-NEXT: call void @llvm.dbg.declare(metadata ptr [[I]], metadata [[META14:![0-9]+]], metadata !DIExpression()), !dbg [[DBG23:![0-9]+]] +; CHECK-NEXT: store i32 0, ptr [[I]], align 4, !dbg [[DBG23]], !tbaa [[TBAA24:![0-9]+]] ; CHECK-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG22]] ; CHECK: for.cond: -; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG26:![0-9]+]], !tbaa [[TBAA24]] -; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG28:![0-9]+]], !tbaa [[TBAA18]] -; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG29:![0-9]+]], !tbaa [[TBAA24]] -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG30:![0-9]+]] +; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 4, !dbg [[DBG26:![0-9]+]], !tbaa [[TBAA24]] +; CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !dbg [[DBG28:![0-9]+]], !tbaa [[TBAA18]] +; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4, !dbg [[DBG29:![0-9]+]], !tbaa [[TBAA24]] +; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], [[TMP2]], !dbg [[DBG30:![0-9]+]] ; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG31:![0-9]+]], !prof [[PROF32:![0-9]+]] ; CHECK: for.cond.cleanup: -; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG33:![0-9]+]] -; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG33]] +; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 4, ptr [[I]]) #[[ATTR3]], !dbg [[DBG33:![0-9]+]] ; CHECK-NEXT: br label [[FOR_END:%.*]] ; CHECK: for.body: -; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG34:![0-9]+]], !tbaa [[TBAA18]] -; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG35:![0-9]+]], !tbaa [[TBAA24]] -; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG34]] -; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG34]] -; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG36:![0-9]+]], !tbaa [[TBAA24]] +; CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !dbg [[DBG34:![0-9]+]], !tbaa [[TBAA18]] +; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[I]], align 4, !dbg [[DBG35:![0-9]+]], !tbaa [[TBAA24]] +; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64, !dbg [[DBG34]] +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i64 [[IDXPROM]], !dbg [[DBG34]] +; CHECK-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !dbg [[DBG36:![0-9]+]], !tbaa [[TBAA24]] ; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG34]] ; CHECK: for.inc: -; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG37:![0-9]+]], !tbaa [[TBAA24]] -; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG37]] -; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG37]], !tbaa [[TBAA24]] +; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[I]], align 4, !dbg [[DBG37:![0-9]+]], !tbaa [[TBAA24]] +; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP5]], 1, !dbg [[DBG37]] +; CHECK-NEXT: store i32 [[INC]], ptr [[I]], align 4, !dbg [[DBG37]], !tbaa [[TBAA24]] ; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG33]], !llvm.loop [[LOOP38:![0-9]+]] ; CHECK: for.end: ; CHECK-NEXT: ret void, !dbg [[DBG40:![0-9]+]] ; entry: - %A.addr = alloca i32*, align 8, !DIAssignID !62 + %A.addr = alloca ptr, align 8, !DIAssignID !62 %i = alloca i32, align 4 - call void @llvm.dbg.assign(metadata i1 undef, metadata !13, metadata !DIExpression(), metadata !62, metadata i32** %A.addr, metadata !DIExpression()), !dbg !20 - store i32* %A, i32** %A.addr, align 8, !tbaa !16 - call void @llvm.dbg.declare(metadata i32** %A.addr, metadata !13, metadata !DIExpression()), !dbg !20 - %0 = bitcast i32* %i to i8*, !dbg !21 - call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #3, !dbg !21 - call void @llvm.dbg.declare(metadata i32* %i, metadata !14, metadata !DIExpression()), !dbg !22 - store i32 0, i32* %i, align 4, !dbg !22, !tbaa !23 + call void @llvm.dbg.assign(metadata i1 undef, metadata !13, metadata !DIExpression(), metadata !62, metadata ptr %A.addr, metadata !DIExpression()), !dbg !20 + store ptr %A, ptr %A.addr, align 8, !tbaa !16 + call void @llvm.dbg.declare(metadata ptr %A.addr, metadata !13, metadata !DIExpression()), !dbg !20 + call void @llvm.lifetime.start.p0(i64 4, ptr %i) #3, !dbg !21 + call void @llvm.dbg.declare(metadata ptr %i, metadata !14, metadata !DIExpression()), !dbg !22 + store i32 0, ptr %i, align 4, !dbg !22, !tbaa !23 br label %for.cond, !dbg !21 for.cond: ; preds = %for.inc, %entry - %1 = load i32, i32* %i, align 4, !dbg !25, !tbaa !23 - %2 = load i32*, i32** %A.addr, align 8, !dbg !27, !tbaa !16 - %3 = load i32, i32* %2, align 4, !dbg !28, !tbaa !23 - %cmp = icmp slt i32 %1, %3, !dbg !29 + %0 = load i32, ptr %i, align 4, !dbg !25, !tbaa !23 + %1 = load ptr, ptr %A.addr, align 8, !dbg !27, !tbaa !16 + %2 = load i32, ptr %1, align 4, !dbg !28, !tbaa !23 + %cmp = icmp slt i32 %0, %2, !dbg !29 br i1 %cmp, label %for.body, label %for.cond.cleanup, !dbg !30, !prof !61 for.cond.cleanup: ; preds = %for.cond - %4 = bitcast i32* %i to i8*, !dbg !31 - call void @llvm.lifetime.end.p0i8(i64 4, i8* %4) #3, !dbg !31 + call void @llvm.lifetime.end.p0(i64 4, ptr %i) #3, !dbg !31 br label %for.end for.body: ; preds = %for.cond - %5 = load i32*, i32** %A.addr, align 8, !dbg !32, !tbaa !16 - %6 = load i32, i32* %i, align 4, !dbg !33, !tbaa !23 - %idxprom = sext i32 %6 to i64, !dbg !32 - %arrayidx = getelementptr inbounds i32, i32* %5, i64 %idxprom, !dbg !32 - store i32 0, i32* %arrayidx, align 4, !dbg !34, !tbaa !23 + %3 = load ptr, ptr %A.addr, align 8, !dbg !32, !tbaa !16 + %4 = load i32, ptr %i, align 4, !dbg !33, !tbaa !23 + %idxprom = sext i32 %4 to i64, !dbg !32 + %arrayidx = getelementptr inbounds i32, ptr %3, i64 %idxprom, !dbg !32 + store i32 0, ptr %arrayidx, align 4, !dbg !34, !tbaa !23 br label %for.inc, !dbg !32 for.inc: ; preds = %for.body - %7 = load i32, i32* %i, align 4, !dbg !35, !tbaa !23 - %inc = add nsw i32 %7, 1, !dbg !35 - store i32 %inc, i32* %i, align 4, !dbg !35, !tbaa !23 + %5 = load i32, ptr %i, align 4, !dbg !35, !tbaa !23 + %inc = add nsw i32 %5, 1, !dbg !35 + store i32 %inc, ptr %i, align 4, !dbg !35, !tbaa !23 br label %for.cond, !dbg !31, !llvm.loop !36 for.end: ; preds = %for.cond.cleanup @@ -92,84 +88,80 @@ for.end: ; preds = %for.cond.cleanup declare void @llvm.dbg.declare(metadata, metadata, metadata) #1 ; Function Attrs: argmemonly nounwind willreturn -declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #2 +declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2 ; Function Attrs: argmemonly nounwind willreturn -declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #2 +declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2 ; Function Attrs: nounwind uwtable -define dso_local void @bar(i32* %A) #0 !dbg !39 { +define dso_local void @bar(ptr %A) #0 !dbg !39 { ; CHECK-LABEL: @bar( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 +; CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 ; CHECK-NEXT: [[I:%.*]] = alloca i32, align 4 -; CHECK-NEXT: store i32* [[A:%.*]], i32** [[A_ADDR]], align 8, !tbaa [[TBAA18]] -; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32** [[A_ADDR]], metadata [[META43:![0-9]+]], metadata !DIExpression()), !dbg [[DBG46:![0-9]+]] -; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG47:![0-9]+]] -; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP0]]) #[[ATTR3]], !dbg [[DBG47]] -; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32* [[I]], metadata [[META44:![0-9]+]], metadata !DIExpression()), !dbg [[DBG48:![0-9]+]] -; CHECK-NEXT: store i32 0, i32* [[I]], align 4, !dbg [[DBG48]], !tbaa [[TBAA24]] +; CHECK-NEXT: store ptr [[A:%.*]], ptr [[A_ADDR]], align 8, !tbaa [[TBAA18]] +; CHECK-NEXT: call void @llvm.dbg.declare(metadata ptr [[A_ADDR]], metadata [[META43:![0-9]+]], metadata !DIExpression()), !dbg [[DBG46:![0-9]+]] +; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr [[I]]) #[[ATTR3]], !dbg [[DBG47:![0-9]+]] +; CHECK-NEXT: call void @llvm.dbg.declare(metadata ptr [[I]], metadata [[META44:![0-9]+]], metadata !DIExpression()), !dbg [[DBG48:![0-9]+]] +; CHECK-NEXT: store i32 0, ptr [[I]], align 4, !dbg [[DBG48]], !tbaa [[TBAA24]] ; CHECK-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG47]] ; CHECK: for.cond: -; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG49:![0-9]+]], !tbaa [[TBAA24]] -; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG51:![0-9]+]], !tbaa [[TBAA18]] -; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG52:![0-9]+]], !tbaa [[TBAA24]] -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG53:![0-9]+]] +; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 4, !dbg [[DBG49:![0-9]+]], !tbaa [[TBAA24]] +; CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !dbg [[DBG51:![0-9]+]], !tbaa [[TBAA18]] +; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4, !dbg [[DBG52:![0-9]+]], !tbaa [[TBAA24]] +; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], [[TMP2]], !dbg [[DBG53:![0-9]+]] ; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG54:![0-9]+]] ; CHECK: for.cond.cleanup: -; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG55:![0-9]+]] -; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG55]] +; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 4, ptr [[I]]) #[[ATTR3]], !dbg [[DBG55:![0-9]+]] ; CHECK-NEXT: br label [[FOR_END:%.*]] ; CHECK: for.body: -; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG56:![0-9]+]], !tbaa [[TBAA18]] -; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG57:![0-9]+]], !tbaa [[TBAA24]] -; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG56]] -; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG56]] -; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG58:![0-9]+]], !tbaa [[TBAA24]] +; CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !dbg [[DBG56:![0-9]+]], !tbaa [[TBAA18]] +; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[I]], align 4, !dbg [[DBG57:![0-9]+]], !tbaa [[TBAA24]] +; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64, !dbg [[DBG56]] +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i64 [[IDXPROM]], !dbg [[DBG56]] +; CHECK-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !dbg [[DBG58:![0-9]+]], !tbaa [[TBAA24]] ; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG56]] ; CHECK: for.inc: -; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG59:![0-9]+]], !tbaa [[TBAA24]] -; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG59]] -; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG59]], !tbaa [[TBAA24]] +; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[I]], align 4, !dbg [[DBG59:![0-9]+]], !tbaa [[TBAA24]] +; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP5]], 1, !dbg [[DBG59]] +; CHECK-NEXT: store i32 [[INC]], ptr [[I]], align 4, !dbg [[DBG59]], !tbaa [[TBAA24]] ; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG55]], !llvm.loop [[LOOP60:![0-9]+]] ; CHECK: for.end: ; CHECK-NEXT: ret void, !dbg [[DBG62:![0-9]+]] ; entry: - %A.addr = alloca i32*, align 8 + %A.addr = alloca ptr, align 8 %i = alloca i32, align 4 - store i32* %A, i32** %A.addr, align 8, !tbaa !16 - call void @llvm.dbg.declare(metadata i32** %A.addr, metadata !41, metadata !DIExpression()), !dbg !44 - %0 = bitcast i32* %i to i8*, !dbg !45 - call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #3, !dbg !45 - call void @llvm.dbg.declare(metadata i32* %i, metadata !42, metadata !DIExpression()), !dbg !46 - store i32 0, i32* %i, align 4, !dbg !46, !tbaa !23 + store ptr %A, ptr %A.addr, align 8, !tbaa !16 + call void @llvm.dbg.declare(metadata ptr %A.addr, metadata !41, metadata !DIExpression()), !dbg !44 + call void @llvm.lifetime.start.p0(i64 4, ptr %i) #3, !dbg !45 + call void @llvm.dbg.declare(metadata ptr %i, metadata !42, metadata !DIExpression()), !dbg !46 + store i32 0, ptr %i, align 4, !dbg !46, !tbaa !23 br label %for.cond, !dbg !45 for.cond: ; preds = %for.inc, %entry - %1 = load i32, i32* %i, align 4, !dbg !47, !tbaa !23 - %2 = load i32*, i32** %A.addr, align 8, !dbg !49, !tbaa !16 - %3 = load i32, i32* %2, align 4, !dbg !50, !tbaa !23 - %cmp = icmp slt i32 %1, %3, !dbg !51 + %0 = load i32, ptr %i, align 4, !dbg !47, !tbaa !23 + %1 = load ptr, ptr %A.addr, align 8, !dbg !49, !tbaa !16 + %2 = load i32, ptr %1, align 4, !dbg !50, !tbaa !23 + %cmp = icmp slt i32 %0, %2, !dbg !51 br i1 %cmp, label %for.body, label %for.cond.cleanup, !dbg !52 for.cond.cleanup: ; preds = %for.cond - %4 = bitcast i32* %i to i8*, !dbg !53 - call void @llvm.lifetime.end.p0i8(i64 4, i8* %4) #3, !dbg !53 + call void @llvm.lifetime.end.p0(i64 4, ptr %i) #3, !dbg !53 br label %for.end for.body: ; preds = %for.cond - %5 = load i32*, i32** %A.addr, align 8, !dbg !54, !tbaa !16 - %6 = load i32, i32* %i, align 4, !dbg !55, !tbaa !23 - %idxprom = sext i32 %6 to i64, !dbg !54 - %arrayidx = getelementptr inbounds i32, i32* %5, i64 %idxprom, !dbg !54 - store i32 0, i32* %arrayidx, align 4, !dbg !56, !tbaa !23 + %3 = load ptr, ptr %A.addr, align 8, !dbg !54, !tbaa !16 + %4 = load i32, ptr %i, align 4, !dbg !55, !tbaa !23 + %idxprom = sext i32 %4 to i64, !dbg !54 + %arrayidx = getelementptr inbounds i32, ptr %3, i64 %idxprom, !dbg !54 + store i32 0, ptr %arrayidx, align 4, !dbg !56, !tbaa !23 br label %for.inc, !dbg !54 for.inc: ; preds = %for.body - %7 = load i32, i32* %i, align 4, !dbg !57, !tbaa !23 - %inc = add nsw i32 %7, 1, !dbg !57 - store i32 %inc, i32* %i, align 4, !dbg !57, !tbaa !23 + %5 = load i32, ptr %i, align 4, !dbg !57, !tbaa !23 + %inc = add nsw i32 %5, 1, !dbg !57 + store i32 %inc, ptr %i, align 4, !dbg !57, !tbaa !23 br label %for.cond, !dbg !53, !llvm.loop !58 for.end: ; preds = %for.cond.cleanup diff --git a/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.funcsig.expected b/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.funcsig.expected index 09db543..d8ec5f3a 100644 --- a/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.funcsig.expected +++ b/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.funcsig.expected @@ -8,81 +8,77 @@ target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16 target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: nounwind uwtable -define dso_local void @foo(i32* %A) #0 !dbg !7 { +define dso_local void @foo(ptr %A) #0 !dbg !7 { ; CHECK-LABEL: define {{[^@]+}}@foo -; CHECK-SAME: (i32* [[A:%.*]]) #[[ATTR0:[0-9]+]] !dbg [[DBG7:![0-9]+]] { +; CHECK-SAME: (ptr [[A:%.*]]) #[[ATTR0:[0-9]+]] !dbg [[DBG7:![0-9]+]] { ; CHECK-NEXT: entry: -; CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8, !DIAssignID [[DIASSIGNID16:![0-9]+]] +; CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8, !DIAssignID [[DIASSIGNID16:![0-9]+]] ; CHECK-NEXT: [[I:%.*]] = alloca i32, align 4 -; CHECK-NEXT: call void @llvm.dbg.assign(metadata i1 undef, metadata [[META13:![0-9]+]], metadata !DIExpression(), metadata [[DIASSIGNID16]], metadata i32** [[A_ADDR]], metadata !DIExpression()), !dbg [[DBG17:![0-9]+]] -; CHECK-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8, !tbaa [[TBAA18:![0-9]+]] -; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32** [[A_ADDR]], metadata [[META13]], metadata !DIExpression()), !dbg [[DBG17]] -; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG22:![0-9]+]] -; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP0]]) #[[ATTR3:[0-9]+]], !dbg [[DBG22]] -; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32* [[I]], metadata [[META14:![0-9]+]], metadata !DIExpression()), !dbg [[DBG23:![0-9]+]] -; CHECK-NEXT: store i32 0, i32* [[I]], align 4, !dbg [[DBG23]], !tbaa [[TBAA24:![0-9]+]] +; CHECK-NEXT: call void @llvm.dbg.assign(metadata i1 undef, metadata [[META13:![0-9]+]], metadata !DIExpression(), metadata [[DIASSIGNID16]], metadata ptr [[A_ADDR]], metadata !DIExpression()), !dbg [[DBG17:![0-9]+]] +; CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8, !tbaa [[TBAA18:![0-9]+]] +; CHECK-NEXT: call void @llvm.dbg.declare(metadata ptr [[A_ADDR]], metadata [[META13]], metadata !DIExpression()), !dbg [[DBG17]] +; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr [[I]]) #[[ATTR3:[0-9]+]], !dbg [[DBG22:![0-9]+]] +; CHECK-NEXT: call void @llvm.dbg.declare(metadata ptr [[I]], metadata [[META14:![0-9]+]], metadata !DIExpression()), !dbg [[DBG23:![0-9]+]] +; CHECK-NEXT: store i32 0, ptr [[I]], align 4, !dbg [[DBG23]], !tbaa [[TBAA24:![0-9]+]] ; CHECK-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG22]] ; CHECK: for.cond: -; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG26:![0-9]+]], !tbaa [[TBAA24]] -; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG28:![0-9]+]], !tbaa [[TBAA18]] -; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG29:![0-9]+]], !tbaa [[TBAA24]] -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG30:![0-9]+]] +; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 4, !dbg [[DBG26:![0-9]+]], !tbaa [[TBAA24]] +; CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !dbg [[DBG28:![0-9]+]], !tbaa [[TBAA18]] +; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4, !dbg [[DBG29:![0-9]+]], !tbaa [[TBAA24]] +; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], [[TMP2]], !dbg [[DBG30:![0-9]+]] ; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG31:![0-9]+]], !prof [[PROF32:![0-9]+]] ; CHECK: for.cond.cleanup: -; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG33:![0-9]+]] -; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG33]] +; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 4, ptr [[I]]) #[[ATTR3]], !dbg [[DBG33:![0-9]+]] ; CHECK-NEXT: br label [[FOR_END:%.*]] ; CHECK: for.body: -; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG34:![0-9]+]], !tbaa [[TBAA18]] -; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG35:![0-9]+]], !tbaa [[TBAA24]] -; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG34]] -; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG34]] -; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG36:![0-9]+]], !tbaa [[TBAA24]] +; CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !dbg [[DBG34:![0-9]+]], !tbaa [[TBAA18]] +; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[I]], align 4, !dbg [[DBG35:![0-9]+]], !tbaa [[TBAA24]] +; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64, !dbg [[DBG34]] +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i64 [[IDXPROM]], !dbg [[DBG34]] +; CHECK-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !dbg [[DBG36:![0-9]+]], !tbaa [[TBAA24]] ; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG34]] ; CHECK: for.inc: -; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG37:![0-9]+]], !tbaa [[TBAA24]] -; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG37]] -; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG37]], !tbaa [[TBAA24]] +; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[I]], align 4, !dbg [[DBG37:![0-9]+]], !tbaa [[TBAA24]] +; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP5]], 1, !dbg [[DBG37]] +; CHECK-NEXT: store i32 [[INC]], ptr [[I]], align 4, !dbg [[DBG37]], !tbaa [[TBAA24]] ; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG33]], !llvm.loop [[LOOP38:![0-9]+]] ; CHECK: for.end: ; CHECK-NEXT: ret void, !dbg [[DBG40:![0-9]+]] ; entry: - %A.addr = alloca i32*, align 8, !DIAssignID !62 + %A.addr = alloca ptr, align 8, !DIAssignID !62 %i = alloca i32, align 4 - call void @llvm.dbg.assign(metadata i1 undef, metadata !13, metadata !DIExpression(), metadata !62, metadata i32** %A.addr, metadata !DIExpression()), !dbg !20 - store i32* %A, i32** %A.addr, align 8, !tbaa !16 - call void @llvm.dbg.declare(metadata i32** %A.addr, metadata !13, metadata !DIExpression()), !dbg !20 - %0 = bitcast i32* %i to i8*, !dbg !21 - call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #3, !dbg !21 - call void @llvm.dbg.declare(metadata i32* %i, metadata !14, metadata !DIExpression()), !dbg !22 - store i32 0, i32* %i, align 4, !dbg !22, !tbaa !23 + call void @llvm.dbg.assign(metadata i1 undef, metadata !13, metadata !DIExpression(), metadata !62, metadata ptr %A.addr, metadata !DIExpression()), !dbg !20 + store ptr %A, ptr %A.addr, align 8, !tbaa !16 + call void @llvm.dbg.declare(metadata ptr %A.addr, metadata !13, metadata !DIExpression()), !dbg !20 + call void @llvm.lifetime.start.p0(i64 4, ptr %i) #3, !dbg !21 + call void @llvm.dbg.declare(metadata ptr %i, metadata !14, metadata !DIExpression()), !dbg !22 + store i32 0, ptr %i, align 4, !dbg !22, !tbaa !23 br label %for.cond, !dbg !21 for.cond: ; preds = %for.inc, %entry - %1 = load i32, i32* %i, align 4, !dbg !25, !tbaa !23 - %2 = load i32*, i32** %A.addr, align 8, !dbg !27, !tbaa !16 - %3 = load i32, i32* %2, align 4, !dbg !28, !tbaa !23 - %cmp = icmp slt i32 %1, %3, !dbg !29 + %0 = load i32, ptr %i, align 4, !dbg !25, !tbaa !23 + %1 = load ptr, ptr %A.addr, align 8, !dbg !27, !tbaa !16 + %2 = load i32, ptr %1, align 4, !dbg !28, !tbaa !23 + %cmp = icmp slt i32 %0, %2, !dbg !29 br i1 %cmp, label %for.body, label %for.cond.cleanup, !dbg !30, !prof !61 for.cond.cleanup: ; preds = %for.cond - %4 = bitcast i32* %i to i8*, !dbg !31 - call void @llvm.lifetime.end.p0i8(i64 4, i8* %4) #3, !dbg !31 + call void @llvm.lifetime.end.p0(i64 4, ptr %i) #3, !dbg !31 br label %for.end for.body: ; preds = %for.cond - %5 = load i32*, i32** %A.addr, align 8, !dbg !32, !tbaa !16 - %6 = load i32, i32* %i, align 4, !dbg !33, !tbaa !23 - %idxprom = sext i32 %6 to i64, !dbg !32 - %arrayidx = getelementptr inbounds i32, i32* %5, i64 %idxprom, !dbg !32 - store i32 0, i32* %arrayidx, align 4, !dbg !34, !tbaa !23 + %3 = load ptr, ptr %A.addr, align 8, !dbg !32, !tbaa !16 + %4 = load i32, ptr %i, align 4, !dbg !33, !tbaa !23 + %idxprom = sext i32 %4 to i64, !dbg !32 + %arrayidx = getelementptr inbounds i32, ptr %3, i64 %idxprom, !dbg !32 + store i32 0, ptr %arrayidx, align 4, !dbg !34, !tbaa !23 br label %for.inc, !dbg !32 for.inc: ; preds = %for.body - %7 = load i32, i32* %i, align 4, !dbg !35, !tbaa !23 - %inc = add nsw i32 %7, 1, !dbg !35 - store i32 %inc, i32* %i, align 4, !dbg !35, !tbaa !23 + %5 = load i32, ptr %i, align 4, !dbg !35, !tbaa !23 + %inc = add nsw i32 %5, 1, !dbg !35 + store i32 %inc, ptr %i, align 4, !dbg !35, !tbaa !23 br label %for.cond, !dbg !31, !llvm.loop !36 for.end: ; preds = %for.cond.cleanup @@ -93,85 +89,81 @@ for.end: ; preds = %for.cond.cleanup declare void @llvm.dbg.declare(metadata, metadata, metadata) #1 ; Function Attrs: argmemonly nounwind willreturn -declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #2 +declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2 ; Function Attrs: argmemonly nounwind willreturn -declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #2 +declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2 ; Function Attrs: nounwind uwtable -define dso_local void @bar(i32* %A) #0 !dbg !39 { +define dso_local void @bar(ptr %A) #0 !dbg !39 { ; CHECK-LABEL: define {{[^@]+}}@bar -; CHECK-SAME: (i32* [[A:%.*]]) #[[ATTR0]] !dbg [[DBG41:![0-9]+]] { +; CHECK-SAME: (ptr [[A:%.*]]) #[[ATTR0]] !dbg [[DBG41:![0-9]+]] { ; CHECK-NEXT: entry: -; CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 +; CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 ; CHECK-NEXT: [[I:%.*]] = alloca i32, align 4 -; CHECK-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8, !tbaa [[TBAA18]] -; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32** [[A_ADDR]], metadata [[META43:![0-9]+]], metadata !DIExpression()), !dbg [[DBG46:![0-9]+]] -; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG47:![0-9]+]] -; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP0]]) #[[ATTR3]], !dbg [[DBG47]] -; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32* [[I]], metadata [[META44:![0-9]+]], metadata !DIExpression()), !dbg [[DBG48:![0-9]+]] -; CHECK-NEXT: store i32 0, i32* [[I]], align 4, !dbg [[DBG48]], !tbaa [[TBAA24]] +; CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8, !tbaa [[TBAA18]] +; CHECK-NEXT: call void @llvm.dbg.declare(metadata ptr [[A_ADDR]], metadata [[META43:![0-9]+]], metadata !DIExpression()), !dbg [[DBG46:![0-9]+]] +; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr [[I]]) #[[ATTR3]], !dbg [[DBG47:![0-9]+]] +; CHECK-NEXT: call void @llvm.dbg.declare(metadata ptr [[I]], metadata [[META44:![0-9]+]], metadata !DIExpression()), !dbg [[DBG48:![0-9]+]] +; CHECK-NEXT: store i32 0, ptr [[I]], align 4, !dbg [[DBG48]], !tbaa [[TBAA24]] ; CHECK-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG47]] ; CHECK: for.cond: -; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG49:![0-9]+]], !tbaa [[TBAA24]] -; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG51:![0-9]+]], !tbaa [[TBAA18]] -; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG52:![0-9]+]], !tbaa [[TBAA24]] -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG53:![0-9]+]] +; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 4, !dbg [[DBG49:![0-9]+]], !tbaa [[TBAA24]] +; CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !dbg [[DBG51:![0-9]+]], !tbaa [[TBAA18]] +; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4, !dbg [[DBG52:![0-9]+]], !tbaa [[TBAA24]] +; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], [[TMP2]], !dbg [[DBG53:![0-9]+]] ; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG54:![0-9]+]] ; CHECK: for.cond.cleanup: -; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG55:![0-9]+]] -; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG55]] +; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 4, ptr [[I]]) #[[ATTR3]], !dbg [[DBG55:![0-9]+]] ; CHECK-NEXT: br label [[FOR_END:%.*]] ; CHECK: for.body: -; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG56:![0-9]+]], !tbaa [[TBAA18]] -; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG57:![0-9]+]], !tbaa [[TBAA24]] -; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG56]] -; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG56]] -; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG58:![0-9]+]], !tbaa [[TBAA24]] +; CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !dbg [[DBG56:![0-9]+]], !tbaa [[TBAA18]] +; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[I]], align 4, !dbg [[DBG57:![0-9]+]], !tbaa [[TBAA24]] +; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64, !dbg [[DBG56]] +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i64 [[IDXPROM]], !dbg [[DBG56]] +; CHECK-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !dbg [[DBG58:![0-9]+]], !tbaa [[TBAA24]] ; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG56]] ; CHECK: for.inc: -; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG59:![0-9]+]], !tbaa [[TBAA24]] -; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG59]] -; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG59]], !tbaa [[TBAA24]] +; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[I]], align 4, !dbg [[DBG59:![0-9]+]], !tbaa [[TBAA24]] +; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP5]], 1, !dbg [[DBG59]] +; CHECK-NEXT: store i32 [[INC]], ptr [[I]], align 4, !dbg [[DBG59]], !tbaa [[TBAA24]] ; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG55]], !llvm.loop [[LOOP60:![0-9]+]] ; CHECK: for.end: ; CHECK-NEXT: ret void, !dbg [[DBG62:![0-9]+]] ; entry: - %A.addr = alloca i32*, align 8 + %A.addr = alloca ptr, align 8 %i = alloca i32, align 4 - store i32* %A, i32** %A.addr, align 8, !tbaa !16 - call void @llvm.dbg.declare(metadata i32** %A.addr, metadata !41, metadata !DIExpression()), !dbg !44 - %0 = bitcast i32* %i to i8*, !dbg !45 - call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #3, !dbg !45 - call void @llvm.dbg.declare(metadata i32* %i, metadata !42, metadata !DIExpression()), !dbg !46 - store i32 0, i32* %i, align 4, !dbg !46, !tbaa !23 + store ptr %A, ptr %A.addr, align 8, !tbaa !16 + call void @llvm.dbg.declare(metadata ptr %A.addr, metadata !41, metadata !DIExpression()), !dbg !44 + call void @llvm.lifetime.start.p0(i64 4, ptr %i) #3, !dbg !45 + call void @llvm.dbg.declare(metadata ptr %i, metadata !42, metadata !DIExpression()), !dbg !46 + store i32 0, ptr %i, align 4, !dbg !46, !tbaa !23 br label %for.cond, !dbg !45 for.cond: ; preds = %for.inc, %entry - %1 = load i32, i32* %i, align 4, !dbg !47, !tbaa !23 - %2 = load i32*, i32** %A.addr, align 8, !dbg !49, !tbaa !16 - %3 = load i32, i32* %2, align 4, !dbg !50, !tbaa !23 - %cmp = icmp slt i32 %1, %3, !dbg !51 + %0 = load i32, ptr %i, align 4, !dbg !47, !tbaa !23 + %1 = load ptr, ptr %A.addr, align 8, !dbg !49, !tbaa !16 + %2 = load i32, ptr %1, align 4, !dbg !50, !tbaa !23 + %cmp = icmp slt i32 %0, %2, !dbg !51 br i1 %cmp, label %for.body, label %for.cond.cleanup, !dbg !52 for.cond.cleanup: ; preds = %for.cond - %4 = bitcast i32* %i to i8*, !dbg !53 - call void @llvm.lifetime.end.p0i8(i64 4, i8* %4) #3, !dbg !53 + call void @llvm.lifetime.end.p0(i64 4, ptr %i) #3, !dbg !53 br label %for.end for.body: ; preds = %for.cond - %5 = load i32*, i32** %A.addr, align 8, !dbg !54, !tbaa !16 - %6 = load i32, i32* %i, align 4, !dbg !55, !tbaa !23 - %idxprom = sext i32 %6 to i64, !dbg !54 - %arrayidx = getelementptr inbounds i32, i32* %5, i64 %idxprom, !dbg !54 - store i32 0, i32* %arrayidx, align 4, !dbg !56, !tbaa !23 + %3 = load ptr, ptr %A.addr, align 8, !dbg !54, !tbaa !16 + %4 = load i32, ptr %i, align 4, !dbg !55, !tbaa !23 + %idxprom = sext i32 %4 to i64, !dbg !54 + %arrayidx = getelementptr inbounds i32, ptr %3, i64 %idxprom, !dbg !54 + store i32 0, ptr %arrayidx, align 4, !dbg !56, !tbaa !23 br label %for.inc, !dbg !54 for.inc: ; preds = %for.body - %7 = load i32, i32* %i, align 4, !dbg !57, !tbaa !23 - %inc = add nsw i32 %7, 1, !dbg !57 - store i32 %inc, i32* %i, align 4, !dbg !57, !tbaa !23 + %5 = load i32, ptr %i, align 4, !dbg !57, !tbaa !23 + %inc = add nsw i32 %5, 1, !dbg !57 + store i32 %inc, ptr %i, align 4, !dbg !57, !tbaa !23 br label %for.cond, !dbg !53, !llvm.loop !58 for.end: ; preds = %for.cond.cleanup diff --git a/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.funcsig.globals.expected b/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.funcsig.globals.expected index 445598f..d71dc3e 100644 --- a/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.funcsig.globals.expected +++ b/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.funcsig.globals.expected @@ -8,81 +8,77 @@ target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16 target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: nounwind uwtable -define dso_local void @foo(i32* %A) #0 !dbg !7 { +define dso_local void @foo(ptr %A) #0 !dbg !7 { ; CHECK-LABEL: define {{[^@]+}}@foo -; CHECK-SAME: (i32* [[A:%.*]]) #[[ATTR0:[0-9]+]] !dbg [[DBG7:![0-9]+]] { +; CHECK-SAME: (ptr [[A:%.*]]) #[[ATTR0:[0-9]+]] !dbg [[DBG7:![0-9]+]] { ; CHECK-NEXT: entry: -; CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8, !DIAssignID [[DIASSIGNID16:![0-9]+]] +; CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8, !DIAssignID [[DIASSIGNID16:![0-9]+]] ; CHECK-NEXT: [[I:%.*]] = alloca i32, align 4 -; CHECK-NEXT: call void @llvm.dbg.assign(metadata i1 undef, metadata [[META13:![0-9]+]], metadata !DIExpression(), metadata [[DIASSIGNID16]], metadata i32** [[A_ADDR]], metadata !DIExpression()), !dbg [[DBG17:![0-9]+]] -; CHECK-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8, !tbaa [[TBAA18:![0-9]+]] -; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32** [[A_ADDR]], metadata [[META13]], metadata !DIExpression()), !dbg [[DBG17]] -; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG22:![0-9]+]] -; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP0]]) #[[ATTR3:[0-9]+]], !dbg [[DBG22]] -; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32* [[I]], metadata [[META14:![0-9]+]], metadata !DIExpression()), !dbg [[DBG23:![0-9]+]] -; CHECK-NEXT: store i32 0, i32* [[I]], align 4, !dbg [[DBG23]], !tbaa [[TBAA24:![0-9]+]] +; CHECK-NEXT: call void @llvm.dbg.assign(metadata i1 undef, metadata [[META13:![0-9]+]], metadata !DIExpression(), metadata [[DIASSIGNID16]], metadata ptr [[A_ADDR]], metadata !DIExpression()), !dbg [[DBG17:![0-9]+]] +; CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8, !tbaa [[TBAA18:![0-9]+]] +; CHECK-NEXT: call void @llvm.dbg.declare(metadata ptr [[A_ADDR]], metadata [[META13]], metadata !DIExpression()), !dbg [[DBG17]] +; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr [[I]]) #[[ATTR3:[0-9]+]], !dbg [[DBG22:![0-9]+]] +; CHECK-NEXT: call void @llvm.dbg.declare(metadata ptr [[I]], metadata [[META14:![0-9]+]], metadata !DIExpression()), !dbg [[DBG23:![0-9]+]] +; CHECK-NEXT: store i32 0, ptr [[I]], align 4, !dbg [[DBG23]], !tbaa [[TBAA24:![0-9]+]] ; CHECK-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG22]] ; CHECK: for.cond: -; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG26:![0-9]+]], !tbaa [[TBAA24]] -; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG28:![0-9]+]], !tbaa [[TBAA18]] -; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG29:![0-9]+]], !tbaa [[TBAA24]] -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG30:![0-9]+]] +; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 4, !dbg [[DBG26:![0-9]+]], !tbaa [[TBAA24]] +; CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !dbg [[DBG28:![0-9]+]], !tbaa [[TBAA18]] +; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4, !dbg [[DBG29:![0-9]+]], !tbaa [[TBAA24]] +; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], [[TMP2]], !dbg [[DBG30:![0-9]+]] ; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG31:![0-9]+]], !prof [[PROF32:![0-9]+]] ; CHECK: for.cond.cleanup: -; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG33:![0-9]+]] -; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG33]] +; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 4, ptr [[I]]) #[[ATTR3]], !dbg [[DBG33:![0-9]+]] ; CHECK-NEXT: br label [[FOR_END:%.*]] ; CHECK: for.body: -; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG34:![0-9]+]], !tbaa [[TBAA18]] -; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG35:![0-9]+]], !tbaa [[TBAA24]] -; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG34]] -; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG34]] -; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG36:![0-9]+]], !tbaa [[TBAA24]] +; CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !dbg [[DBG34:![0-9]+]], !tbaa [[TBAA18]] +; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[I]], align 4, !dbg [[DBG35:![0-9]+]], !tbaa [[TBAA24]] +; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64, !dbg [[DBG34]] +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i64 [[IDXPROM]], !dbg [[DBG34]] +; CHECK-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !dbg [[DBG36:![0-9]+]], !tbaa [[TBAA24]] ; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG34]] ; CHECK: for.inc: -; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG37:![0-9]+]], !tbaa [[TBAA24]] -; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG37]] -; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG37]], !tbaa [[TBAA24]] +; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[I]], align 4, !dbg [[DBG37:![0-9]+]], !tbaa [[TBAA24]] +; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP5]], 1, !dbg [[DBG37]] +; CHECK-NEXT: store i32 [[INC]], ptr [[I]], align 4, !dbg [[DBG37]], !tbaa [[TBAA24]] ; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG33]], !llvm.loop [[LOOP38:![0-9]+]] ; CHECK: for.end: ; CHECK-NEXT: ret void, !dbg [[DBG40:![0-9]+]] ; entry: - %A.addr = alloca i32*, align 8, !DIAssignID !62 + %A.addr = alloca ptr, align 8, !DIAssignID !62 %i = alloca i32, align 4 - call void @llvm.dbg.assign(metadata i1 undef, metadata !13, metadata !DIExpression(), metadata !62, metadata i32** %A.addr, metadata !DIExpression()), !dbg !20 - store i32* %A, i32** %A.addr, align 8, !tbaa !16 - call void @llvm.dbg.declare(metadata i32** %A.addr, metadata !13, metadata !DIExpression()), !dbg !20 - %0 = bitcast i32* %i to i8*, !dbg !21 - call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #3, !dbg !21 - call void @llvm.dbg.declare(metadata i32* %i, metadata !14, metadata !DIExpression()), !dbg !22 - store i32 0, i32* %i, align 4, !dbg !22, !tbaa !23 + call void @llvm.dbg.assign(metadata i1 undef, metadata !13, metadata !DIExpression(), metadata !62, metadata ptr %A.addr, metadata !DIExpression()), !dbg !20 + store ptr %A, ptr %A.addr, align 8, !tbaa !16 + call void @llvm.dbg.declare(metadata ptr %A.addr, metadata !13, metadata !DIExpression()), !dbg !20 + call void @llvm.lifetime.start.p0(i64 4, ptr %i) #3, !dbg !21 + call void @llvm.dbg.declare(metadata ptr %i, metadata !14, metadata !DIExpression()), !dbg !22 + store i32 0, ptr %i, align 4, !dbg !22, !tbaa !23 br label %for.cond, !dbg !21 for.cond: ; preds = %for.inc, %entry - %1 = load i32, i32* %i, align 4, !dbg !25, !tbaa !23 - %2 = load i32*, i32** %A.addr, align 8, !dbg !27, !tbaa !16 - %3 = load i32, i32* %2, align 4, !dbg !28, !tbaa !23 - %cmp = icmp slt i32 %1, %3, !dbg !29 + %0 = load i32, ptr %i, align 4, !dbg !25, !tbaa !23 + %1 = load ptr, ptr %A.addr, align 8, !dbg !27, !tbaa !16 + %2 = load i32, ptr %1, align 4, !dbg !28, !tbaa !23 + %cmp = icmp slt i32 %0, %2, !dbg !29 br i1 %cmp, label %for.body, label %for.cond.cleanup, !dbg !30, !prof !61 for.cond.cleanup: ; preds = %for.cond - %4 = bitcast i32* %i to i8*, !dbg !31 - call void @llvm.lifetime.end.p0i8(i64 4, i8* %4) #3, !dbg !31 + call void @llvm.lifetime.end.p0(i64 4, ptr %i) #3, !dbg !31 br label %for.end for.body: ; preds = %for.cond - %5 = load i32*, i32** %A.addr, align 8, !dbg !32, !tbaa !16 - %6 = load i32, i32* %i, align 4, !dbg !33, !tbaa !23 - %idxprom = sext i32 %6 to i64, !dbg !32 - %arrayidx = getelementptr inbounds i32, i32* %5, i64 %idxprom, !dbg !32 - store i32 0, i32* %arrayidx, align 4, !dbg !34, !tbaa !23 + %3 = load ptr, ptr %A.addr, align 8, !dbg !32, !tbaa !16 + %4 = load i32, ptr %i, align 4, !dbg !33, !tbaa !23 + %idxprom = sext i32 %4 to i64, !dbg !32 + %arrayidx = getelementptr inbounds i32, ptr %3, i64 %idxprom, !dbg !32 + store i32 0, ptr %arrayidx, align 4, !dbg !34, !tbaa !23 br label %for.inc, !dbg !32 for.inc: ; preds = %for.body - %7 = load i32, i32* %i, align 4, !dbg !35, !tbaa !23 - %inc = add nsw i32 %7, 1, !dbg !35 - store i32 %inc, i32* %i, align 4, !dbg !35, !tbaa !23 + %5 = load i32, ptr %i, align 4, !dbg !35, !tbaa !23 + %inc = add nsw i32 %5, 1, !dbg !35 + store i32 %inc, ptr %i, align 4, !dbg !35, !tbaa !23 br label %for.cond, !dbg !31, !llvm.loop !36 for.end: ; preds = %for.cond.cleanup @@ -93,85 +89,81 @@ for.end: ; preds = %for.cond.cleanup declare void @llvm.dbg.declare(metadata, metadata, metadata) #1 ; Function Attrs: argmemonly nounwind willreturn -declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #2 +declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2 ; Function Attrs: argmemonly nounwind willreturn -declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #2 +declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2 ; Function Attrs: nounwind uwtable -define dso_local void @bar(i32* %A) #0 !dbg !39 { +define dso_local void @bar(ptr %A) #0 !dbg !39 { ; CHECK-LABEL: define {{[^@]+}}@bar -; CHECK-SAME: (i32* [[A:%.*]]) #[[ATTR0]] !dbg [[DBG41:![0-9]+]] { +; CHECK-SAME: (ptr [[A:%.*]]) #[[ATTR0]] !dbg [[DBG41:![0-9]+]] { ; CHECK-NEXT: entry: -; CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 +; CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 ; CHECK-NEXT: [[I:%.*]] = alloca i32, align 4 -; CHECK-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8, !tbaa [[TBAA18]] -; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32** [[A_ADDR]], metadata [[META43:![0-9]+]], metadata !DIExpression()), !dbg [[DBG46:![0-9]+]] -; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG47:![0-9]+]] -; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP0]]) #[[ATTR3]], !dbg [[DBG47]] -; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32* [[I]], metadata [[META44:![0-9]+]], metadata !DIExpression()), !dbg [[DBG48:![0-9]+]] -; CHECK-NEXT: store i32 0, i32* [[I]], align 4, !dbg [[DBG48]], !tbaa [[TBAA24]] +; CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8, !tbaa [[TBAA18]] +; CHECK-NEXT: call void @llvm.dbg.declare(metadata ptr [[A_ADDR]], metadata [[META43:![0-9]+]], metadata !DIExpression()), !dbg [[DBG46:![0-9]+]] +; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr [[I]]) #[[ATTR3]], !dbg [[DBG47:![0-9]+]] +; CHECK-NEXT: call void @llvm.dbg.declare(metadata ptr [[I]], metadata [[META44:![0-9]+]], metadata !DIExpression()), !dbg [[DBG48:![0-9]+]] +; CHECK-NEXT: store i32 0, ptr [[I]], align 4, !dbg [[DBG48]], !tbaa [[TBAA24]] ; CHECK-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG47]] ; CHECK: for.cond: -; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG49:![0-9]+]], !tbaa [[TBAA24]] -; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG51:![0-9]+]], !tbaa [[TBAA18]] -; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG52:![0-9]+]], !tbaa [[TBAA24]] -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG53:![0-9]+]] +; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 4, !dbg [[DBG49:![0-9]+]], !tbaa [[TBAA24]] +; CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !dbg [[DBG51:![0-9]+]], !tbaa [[TBAA18]] +; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4, !dbg [[DBG52:![0-9]+]], !tbaa [[TBAA24]] +; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], [[TMP2]], !dbg [[DBG53:![0-9]+]] ; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG54:![0-9]+]] ; CHECK: for.cond.cleanup: -; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG55:![0-9]+]] -; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG55]] +; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 4, ptr [[I]]) #[[ATTR3]], !dbg [[DBG55:![0-9]+]] ; CHECK-NEXT: br label [[FOR_END:%.*]] ; CHECK: for.body: -; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG56:![0-9]+]], !tbaa [[TBAA18]] -; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG57:![0-9]+]], !tbaa [[TBAA24]] -; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG56]] -; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG56]] -; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG58:![0-9]+]], !tbaa [[TBAA24]] +; CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !dbg [[DBG56:![0-9]+]], !tbaa [[TBAA18]] +; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[I]], align 4, !dbg [[DBG57:![0-9]+]], !tbaa [[TBAA24]] +; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64, !dbg [[DBG56]] +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i64 [[IDXPROM]], !dbg [[DBG56]] +; CHECK-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !dbg [[DBG58:![0-9]+]], !tbaa [[TBAA24]] ; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG56]] ; CHECK: for.inc: -; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG59:![0-9]+]], !tbaa [[TBAA24]] -; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG59]] -; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG59]], !tbaa [[TBAA24]] +; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[I]], align 4, !dbg [[DBG59:![0-9]+]], !tbaa [[TBAA24]] +; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP5]], 1, !dbg [[DBG59]] +; CHECK-NEXT: store i32 [[INC]], ptr [[I]], align 4, !dbg [[DBG59]], !tbaa [[TBAA24]] ; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG55]], !llvm.loop [[LOOP60:![0-9]+]] ; CHECK: for.end: ; CHECK-NEXT: ret void, !dbg [[DBG62:![0-9]+]] ; entry: - %A.addr = alloca i32*, align 8 + %A.addr = alloca ptr, align 8 %i = alloca i32, align 4 - store i32* %A, i32** %A.addr, align 8, !tbaa !16 - call void @llvm.dbg.declare(metadata i32** %A.addr, metadata !41, metadata !DIExpression()), !dbg !44 - %0 = bitcast i32* %i to i8*, !dbg !45 - call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #3, !dbg !45 - call void @llvm.dbg.declare(metadata i32* %i, metadata !42, metadata !DIExpression()), !dbg !46 - store i32 0, i32* %i, align 4, !dbg !46, !tbaa !23 + store ptr %A, ptr %A.addr, align 8, !tbaa !16 + call void @llvm.dbg.declare(metadata ptr %A.addr, metadata !41, metadata !DIExpression()), !dbg !44 + call void @llvm.lifetime.start.p0(i64 4, ptr %i) #3, !dbg !45 + call void @llvm.dbg.declare(metadata ptr %i, metadata !42, metadata !DIExpression()), !dbg !46 + store i32 0, ptr %i, align 4, !dbg !46, !tbaa !23 br label %for.cond, !dbg !45 for.cond: ; preds = %for.inc, %entry - %1 = load i32, i32* %i, align 4, !dbg !47, !tbaa !23 - %2 = load i32*, i32** %A.addr, align 8, !dbg !49, !tbaa !16 - %3 = load i32, i32* %2, align 4, !dbg !50, !tbaa !23 - %cmp = icmp slt i32 %1, %3, !dbg !51 + %0 = load i32, ptr %i, align 4, !dbg !47, !tbaa !23 + %1 = load ptr, ptr %A.addr, align 8, !dbg !49, !tbaa !16 + %2 = load i32, ptr %1, align 4, !dbg !50, !tbaa !23 + %cmp = icmp slt i32 %0, %2, !dbg !51 br i1 %cmp, label %for.body, label %for.cond.cleanup, !dbg !52 for.cond.cleanup: ; preds = %for.cond - %4 = bitcast i32* %i to i8*, !dbg !53 - call void @llvm.lifetime.end.p0i8(i64 4, i8* %4) #3, !dbg !53 + call void @llvm.lifetime.end.p0(i64 4, ptr %i) #3, !dbg !53 br label %for.end for.body: ; preds = %for.cond - %5 = load i32*, i32** %A.addr, align 8, !dbg !54, !tbaa !16 - %6 = load i32, i32* %i, align 4, !dbg !55, !tbaa !23 - %idxprom = sext i32 %6 to i64, !dbg !54 - %arrayidx = getelementptr inbounds i32, i32* %5, i64 %idxprom, !dbg !54 - store i32 0, i32* %arrayidx, align 4, !dbg !56, !tbaa !23 + %3 = load ptr, ptr %A.addr, align 8, !dbg !54, !tbaa !16 + %4 = load i32, ptr %i, align 4, !dbg !55, !tbaa !23 + %idxprom = sext i32 %4 to i64, !dbg !54 + %arrayidx = getelementptr inbounds i32, ptr %3, i64 %idxprom, !dbg !54 + store i32 0, ptr %arrayidx, align 4, !dbg !56, !tbaa !23 br label %for.inc, !dbg !54 for.inc: ; preds = %for.body - %7 = load i32, i32* %i, align 4, !dbg !57, !tbaa !23 - %inc = add nsw i32 %7, 1, !dbg !57 - store i32 %inc, i32* %i, align 4, !dbg !57, !tbaa !23 + %5 = load i32, ptr %i, align 4, !dbg !57, !tbaa !23 + %inc = add nsw i32 %5, 1, !dbg !57 + store i32 %inc, ptr %i, align 4, !dbg !57, !tbaa !23 br label %for.cond, !dbg !53, !llvm.loop !58 for.end: ; preds = %for.cond.cleanup |