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author | Craig Topper <craig.topper@sifive.com> | 2024-06-27 17:31:55 -0700 |
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committer | Craig Topper <craig.topper@sifive.com> | 2024-06-27 18:42:27 -0700 |
commit | 2dff96d37a8419dab7a6ec3e1f8de917c7adb4ea (patch) | |
tree | f0c1e4b780ff2221e5c4249a4406167f54ea2af5 | |
parent | eec9d0b6816e815fbe009941c1fda3b39c38adeb (diff) | |
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[RISCV] Remove unneeded code from RISCVPostRAExpandPseudo::expandMovImm. NFC
We accidentally left a call to generateInstSeq when we rewrote the
code to use the X86InstrInfo::movImm.
-rw-r--r-- | llvm/lib/Target/RISCV/RISCVPostRAExpandPseudoInsts.cpp | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/llvm/lib/Target/RISCV/RISCVPostRAExpandPseudoInsts.cpp b/llvm/lib/Target/RISCV/RISCVPostRAExpandPseudoInsts.cpp index b7b0c47..e5413f6 100644 --- a/llvm/lib/Target/RISCV/RISCVPostRAExpandPseudoInsts.cpp +++ b/llvm/lib/Target/RISCV/RISCVPostRAExpandPseudoInsts.cpp @@ -89,10 +89,6 @@ bool RISCVPostRAExpandPseudo::expandMovImm(MachineBasicBlock &MBB, int64_t Val = MBBI->getOperand(1).getImm(); - RISCVMatInt::InstSeq Seq = - RISCVMatInt::generateInstSeq(Val, MBB.getParent()->getSubtarget()); - assert(!Seq.empty()); - Register DstReg = MBBI->getOperand(0).getReg(); bool DstIsDead = MBBI->getOperand(0).isDead(); bool Renamable = MBBI->getOperand(0).isRenamable(); |