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authorFelipe de Azevedo Piovezan <fpiovezan@apple.com>2023-05-02 14:05:04 -0400
committerFelipe de Azevedo Piovezan <fpiovezan@apple.com>2023-05-12 12:00:13 -0400
commit2da29955fbc9753e7f0d565d64cc859492ab6afb (patch)
treeb21fc40aa7919788e7a607b209d8d11a2440fc40
parent53a4adc0deb29fcc1f907ea7bc151fdebecf406d (diff)
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[SelectionDAG][DebugInfo] Implement translation of entry_value vars
This commit implements SelectionDAG lowering of dbg.declare intrinsics targeting swiftasync Arguments, by putting them in the MachineFunction's table of variables whose location doesn't change throughout the function. Depends on D149882 Differential Revision: https://reviews.llvm.org/D149883
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp28
-rw-r--r--llvm/test/CodeGen/AArch64/dbg-declare-swift-async.ll2
2 files changed, 30 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index 36611b1..35abd99 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -1342,6 +1342,30 @@ static bool isFoldedOrDeadInstruction(const Instruction *I,
!FuncInfo.isExportedInst(I); // Exported instrs must be computed.
}
+static bool processIfEntryValueDbgDeclare(FunctionLoweringInfo &FuncInfo,
+ const Value *Arg, DIExpression *Expr,
+ DILocalVariable *Var,
+ DebugLoc DbgLoc) {
+ if (!Expr->isEntryValue() || !isa<Argument>(Arg))
+ return false;
+
+ auto ArgIt = FuncInfo.ValueMap.find(Arg);
+ if (ArgIt == FuncInfo.ValueMap.end())
+ return false;
+ Register ArgVReg = ArgIt->getSecond();
+
+ // Find the corresponding livein physical register to this argument.
+ for (auto [PhysReg, VirtReg] : FuncInfo.RegInfo->liveins())
+ if (VirtReg == ArgVReg) {
+ FuncInfo.MF->setVariableDbgInfo(Var, Expr, PhysReg, DbgLoc);
+ LLVM_DEBUG(dbgs() << "processDbgDeclare: setVariableDbgInfo Var=" << *Var
+ << ", Expr=" << *Expr << ", MCRegister=" << PhysReg
+ << ", DbgLoc=" << DbgLoc << "\n");
+ return true;
+ }
+ return false;
+}
+
static bool processDbgDeclare(FunctionLoweringInfo &FuncInfo,
const Value *Address, DIExpression *Expr,
DILocalVariable *Var, DebugLoc DbgLoc) {
@@ -1350,6 +1374,10 @@ static bool processDbgDeclare(FunctionLoweringInfo &FuncInfo,
<< " (bad address)\n");
return false;
}
+
+ if (processIfEntryValueDbgDeclare(FuncInfo, Address, Expr, Var, DbgLoc))
+ return true;
+
MachineFunction *MF = FuncInfo.MF;
const DataLayout &DL = MF->getDataLayout();
diff --git a/llvm/test/CodeGen/AArch64/dbg-declare-swift-async.ll b/llvm/test/CodeGen/AArch64/dbg-declare-swift-async.ll
index 4a68f05..8309090 100644
--- a/llvm/test/CodeGen/AArch64/dbg-declare-swift-async.ll
+++ b/llvm/test/CodeGen/AArch64/dbg-declare-swift-async.ll
@@ -1,4 +1,6 @@
; RUN: llc -O0 -global-isel -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s
+; RUN: llc -O0 -fast-isel -stop-after=finalize-isel %s -o - | FileCheck %s
+; RUN: llc -O0 -fast-isel=false -global-isel=false -stop-after=finalize-isel %s -o - | FileCheck %s
; CHECK: void @foo
; CHECK-NEXT: dbg.declare(metadata {{.*}}, metadata ![[VAR:.*]], metadata ![[EXPR:.*]]), !dbg ![[LOC:.*]]