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author | Iris Shi <0.0@owo.li> | 2025-08-05 11:26:40 +0800 |
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committer | GitHub <noreply@github.com> | 2025-08-05 11:26:40 +0800 |
commit | 203b35d214252349d58abba558ed086e281bd208 (patch) | |
tree | 383e8951c45e483c4d29aea2d6e5f7311a01e168 | |
parent | d02714c85a5e4794b9c77d7b2aae979633fe2566 (diff) | |
download | llvm-203b35d214252349d58abba558ed086e281bd208.zip llvm-203b35d214252349d58abba558ed086e281bd208.tar.gz llvm-203b35d214252349d58abba558ed086e281bd208.tar.bz2 |
[NFC] Precommit test for "[RISCV] Create disjoint or in RISCVGatherScatterLowering" (#152068)
#151981
-rw-r--r-- | llvm/test/CodeGen/RISCV/rvv/strided-load-store.ll | 31 |
1 files changed, 29 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/RISCV/rvv/strided-load-store.ll b/llvm/test/CodeGen/RISCV/rvv/strided-load-store.ll index 45f158f..7039bf4 100644 --- a/llvm/test/CodeGen/RISCV/rvv/strided-load-store.ll +++ b/llvm/test/CodeGen/RISCV/rvv/strided-load-store.ll @@ -443,8 +443,8 @@ define <vscale x 1 x i64> @straightline_offset_add(ptr %p, i64 %offset) { ret <vscale x 1 x i64> %x } -define <vscale x 1 x i64> @straightline_offset_disjoint_or(ptr %p, i64 %offset) { -; CHECK-LABEL: @straightline_offset_disjoint_or( +define <vscale x 1 x i64> @straightline_offset_disjoint_or_1(ptr %p) { +; CHECK-LABEL: @straightline_offset_disjoint_or_1( ; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i32, ptr [[P:%.*]], i64 1 ; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.vscale.i32() ; CHECK-NEXT: [[TMP3:%.*]] = call <vscale x 1 x i64> @llvm.experimental.vp.strided.load.nxv1i64.p0.i64(ptr [[TMP1]], i64 8, <vscale x 1 x i1> splat (i1 true), i32 [[TMP2]]) @@ -464,6 +464,33 @@ define <vscale x 1 x i64> @straightline_offset_disjoint_or(ptr %p, i64 %offset) ret <vscale x 1 x i64> %x } +define <vscale x 1 x i64> @straightline_offset_disjoint_or(ptr %p, i1 %offset) { +; CHECK-LABEL: @straightline_offset_disjoint_or( +; CHECK-NEXT: [[AND:%.*]] = zext i1 [[OFFSET:%.*]] to i64 +; CHECK-NEXT: [[TMP4:%.*]] = add i64 4, [[AND]] +; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i32, ptr [[P:%.*]], i64 [[TMP4]] +; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.vscale.i32() +; CHECK-NEXT: [[TMP3:%.*]] = call <vscale x 1 x i64> @llvm.experimental.vp.strided.load.nxv1i64.p0.i64(ptr [[TMP1]], i64 8, <vscale x 1 x i1> splat (i1 true), i32 [[TMP2]]) +; CHECK-NEXT: [[X:%.*]] = call <vscale x 1 x i64> @llvm.vp.select.nxv1i64(<vscale x 1 x i1> splat (i1 true), <vscale x 1 x i64> [[TMP3]], <vscale x 1 x i64> poison, i32 [[TMP2]]) +; CHECK-NEXT: ret <vscale x 1 x i64> [[X]] +; + %step = call <vscale x 1 x i64> @llvm.stepvector.nxv1i64() + %step.shl = shl <vscale x 1 x i64> %step, splat (i64 1) + %add = add <vscale x 1 x i64> %step.shl, splat (i64 4) + %zext = zext i1 %offset to i64 + %splat.insert = insertelement <vscale x 1 x i64> poison, i64 %zext, i64 0 + %splat = shufflevector <vscale x 1 x i64> %splat.insert, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer + %offsetv = or disjoint <vscale x 1 x i64> %add, %splat + %ptrs = getelementptr i32, ptr %p, <vscale x 1 x i64> %offsetv + %x = call <vscale x 1 x i64> @llvm.masked.gather.nxv1i64.nxv1p0( + <vscale x 1 x ptr> %ptrs, + i32 8, + <vscale x 1 x i1> splat (i1 true), + <vscale x 1 x i64> poison + ) + ret <vscale x 1 x i64> %x +} + define <vscale x 1 x i64> @straightline_offset_shl(ptr %p) { ; CHECK-LABEL: @straightline_offset_shl( ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.vscale.i32() |