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author | Rahul Joshi <rjoshi@nvidia.com> | 2025-04-07 12:56:16 -0700 |
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committer | GitHub <noreply@github.com> | 2025-04-07 12:56:16 -0700 |
commit | 19dbde0e81e98758ae9d37ef027bc8d9bbd673df (patch) | |
tree | 4f5e9a33d8efe5162212ef74a9d1e0caf7ef4b25 | |
parent | 3479c574667eec375cc4ed91e0d63aa2d408b62c (diff) | |
download | llvm-19dbde0e81e98758ae9d37ef027bc8d9bbd673df.zip llvm-19dbde0e81e98758ae9d37ef027bc8d9bbd673df.tar.gz llvm-19dbde0e81e98758ae9d37ef027bc8d9bbd673df.tar.bz2 |
[NFC][LLVM] Cleanup pass initialization for ARM/ARV/Lanai/X86/XCore (#134400)
- Remove pass initialization from pass constructors.
- https://github.com/llvm/llvm-project/issues/111767
-rw-r--r-- | llvm/lib/Target/ARM/ARMFixCortexA57AES1742098Pass.cpp | 4 | ||||
-rw-r--r-- | llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp | 11 | ||||
-rw-r--r-- | llvm/lib/Target/Lanai/Lanai.h | 1 | ||||
-rw-r--r-- | llvm/lib/Target/Lanai/LanaiMemAluCombiner.cpp | 9 | ||||
-rw-r--r-- | llvm/lib/Target/Lanai/LanaiTargetMachine.cpp | 5 | ||||
-rw-r--r-- | llvm/lib/Target/X86/X86LowerAMXIntrinsics.cpp | 5 | ||||
-rw-r--r-- | llvm/lib/Target/XCore/XCoreLowerThreadLocal.cpp | 4 | ||||
-rw-r--r-- | llvm/lib/Target/XCore/XCoreTargetMachine.cpp | 1 |
8 files changed, 12 insertions, 28 deletions
diff --git a/llvm/lib/Target/ARM/ARMFixCortexA57AES1742098Pass.cpp b/llvm/lib/Target/ARM/ARMFixCortexA57AES1742098Pass.cpp index 5ff6023..7d18242 100644 --- a/llvm/lib/Target/ARM/ARMFixCortexA57AES1742098Pass.cpp +++ b/llvm/lib/Target/ARM/ARMFixCortexA57AES1742098Pass.cpp @@ -70,9 +70,7 @@ namespace { class ARMFixCortexA57AES1742098 : public MachineFunctionPass { public: static char ID; - explicit ARMFixCortexA57AES1742098() : MachineFunctionPass(ID) { - initializeARMFixCortexA57AES1742098Pass(*PassRegistry::getPassRegistry()); - } + explicit ARMFixCortexA57AES1742098() : MachineFunctionPass(ID) {} bool runOnMachineFunction(MachineFunction &F) override; diff --git a/llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp b/llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp index f257cce..440d852 100644 --- a/llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp +++ b/llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp @@ -34,9 +34,7 @@ class AVRExpandPseudo : public MachineFunctionPass { public: static char ID; - AVRExpandPseudo() : MachineFunctionPass(ID) { - initializeAVRExpandPseudoPass(*PassRegistry::getPassRegistry()); - } + AVRExpandPseudo() : MachineFunctionPass(ID) {} bool runOnMachineFunction(MachineFunction &MF) override; @@ -2643,8 +2641,7 @@ bool AVRExpandPseudo::expandMI(Block &MBB, BlockIt MBBI) { INITIALIZE_PASS(AVRExpandPseudo, "avr-expand-pseudo", AVR_EXPAND_PSEUDO_NAME, false, false) -namespace llvm { - -FunctionPass *createAVRExpandPseudoPass() { return new AVRExpandPseudo(); } -} // end of namespace llvm +FunctionPass *llvm::createAVRExpandPseudoPass() { + return new AVRExpandPseudo(); +} diff --git a/llvm/lib/Target/Lanai/Lanai.h b/llvm/lib/Target/Lanai/Lanai.h index 72a7efc..1ef4462 100644 --- a/llvm/lib/Target/Lanai/Lanai.h +++ b/llvm/lib/Target/Lanai/Lanai.h @@ -38,6 +38,7 @@ FunctionPass *createLanaiMemAluCombinerPass(); FunctionPass *createLanaiSetflagAluCombinerPass(); void initializeLanaiDAGToDAGISelLegacyPass(PassRegistry &); +void initializeLanaiMemAluCombinerPass(PassRegistry &); } // namespace llvm diff --git a/llvm/lib/Target/Lanai/LanaiMemAluCombiner.cpp b/llvm/lib/Target/Lanai/LanaiMemAluCombiner.cpp index 2442d7e..9fd1ff6 100644 --- a/llvm/lib/Target/Lanai/LanaiMemAluCombiner.cpp +++ b/llvm/lib/Target/Lanai/LanaiMemAluCombiner.cpp @@ -22,6 +22,7 @@ // in the same machine basic block into one machine instruction. //===----------------------------------------------------------------------===// +#include "Lanai.h" #include "LanaiAluCode.h" #include "LanaiTargetMachine.h" #include "llvm/ADT/Statistic.h" @@ -44,10 +45,6 @@ static llvm::cl::opt<bool> DisableMemAluCombiner( llvm::cl::desc("Do not combine ALU and memory operators"), llvm::cl::Hidden); -namespace llvm { -void initializeLanaiMemAluCombinerPass(PassRegistry &); -} // namespace llvm - namespace { typedef MachineBasicBlock::iterator MbbIterator; typedef MachineFunction::iterator MfIterator; @@ -55,9 +52,7 @@ typedef MachineFunction::iterator MfIterator; class LanaiMemAluCombiner : public MachineFunctionPass { public: static char ID; - explicit LanaiMemAluCombiner() : MachineFunctionPass(ID) { - initializeLanaiMemAluCombinerPass(*PassRegistry::getPassRegistry()); - } + explicit LanaiMemAluCombiner() : MachineFunctionPass(ID) {} StringRef getPassName() const override { return "Lanai load / store optimization pass"; diff --git a/llvm/lib/Target/Lanai/LanaiTargetMachine.cpp b/llvm/lib/Target/Lanai/LanaiTargetMachine.cpp index 05420b9..f5e8328 100644 --- a/llvm/lib/Target/Lanai/LanaiTargetMachine.cpp +++ b/llvm/lib/Target/Lanai/LanaiTargetMachine.cpp @@ -26,16 +26,13 @@ using namespace llvm; -namespace llvm { -void initializeLanaiMemAluCombinerPass(PassRegistry &); -} // namespace llvm - extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeLanaiTarget() { // Register the target. RegisterTargetMachine<LanaiTargetMachine> registered_target( getTheLanaiTarget()); PassRegistry &PR = *PassRegistry::getPassRegistry(); initializeLanaiDAGToDAGISelLegacyPass(PR); + initializeLanaiMemAluCombinerPass(PR); } static std::string computeDataLayout() { diff --git a/llvm/lib/Target/X86/X86LowerAMXIntrinsics.cpp b/llvm/lib/Target/X86/X86LowerAMXIntrinsics.cpp index 0a187ee..7f33939 100644 --- a/llvm/lib/Target/X86/X86LowerAMXIntrinsics.cpp +++ b/llvm/lib/Target/X86/X86LowerAMXIntrinsics.cpp @@ -631,10 +631,7 @@ class X86LowerAMXIntrinsicsLegacyPass : public FunctionPass { public: static char ID; - X86LowerAMXIntrinsicsLegacyPass() : FunctionPass(ID) { - initializeX86LowerAMXIntrinsicsLegacyPassPass( - *PassRegistry::getPassRegistry()); - } + X86LowerAMXIntrinsicsLegacyPass() : FunctionPass(ID) {} bool runOnFunction(Function &F) override { if (!X86ScalarizeAMX) diff --git a/llvm/lib/Target/XCore/XCoreLowerThreadLocal.cpp b/llvm/lib/Target/XCore/XCoreLowerThreadLocal.cpp index 3870e80..9e37302 100644 --- a/llvm/lib/Target/XCore/XCoreLowerThreadLocal.cpp +++ b/llvm/lib/Target/XCore/XCoreLowerThreadLocal.cpp @@ -41,9 +41,7 @@ namespace { struct XCoreLowerThreadLocal : public ModulePass { static char ID; - XCoreLowerThreadLocal() : ModulePass(ID) { - initializeXCoreLowerThreadLocalPass(*PassRegistry::getPassRegistry()); - } + XCoreLowerThreadLocal() : ModulePass(ID) {} bool lowerGlobal(GlobalVariable *GV); diff --git a/llvm/lib/Target/XCore/XCoreTargetMachine.cpp b/llvm/lib/Target/XCore/XCoreTargetMachine.cpp index a04f5b9..fc93ab5 100644 --- a/llvm/lib/Target/XCore/XCoreTargetMachine.cpp +++ b/llvm/lib/Target/XCore/XCoreTargetMachine.cpp @@ -106,6 +106,7 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeXCoreTarget() { RegisterTargetMachine<XCoreTargetMachine> X(getTheXCoreTarget()); PassRegistry &PR = *PassRegistry::getPassRegistry(); initializeXCoreDAGToDAGISelLegacyPass(PR); + initializeXCoreLowerThreadLocalPass(PR); } TargetTransformInfo |