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authorJinsong Ji <jji@us.ibm.com>2020-12-09 03:15:45 +0000
committerJinsong Ji <jji@us.ibm.com>2020-12-09 03:37:00 +0000
commit02b2c024193b1985d85855a7f85b98aef9ebbcdb (patch)
treeb3e987a775fcaf2565335b33d339fcc86f5161cf
parentac6ada4d3e059397d2812c8c0bd449214bc58737 (diff)
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[PowerPC] Precommit testcases for regpressure compute fix
-rw-r--r--llvm/test/CodeGen/PowerPC/compute-regpressure.ll30
1 files changed, 30 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/PowerPC/compute-regpressure.ll b/llvm/test/CodeGen/PowerPC/compute-regpressure.ll
new file mode 100644
index 0000000..7a15e46
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/compute-regpressure.ll
@@ -0,0 +1,30 @@
+; REQUIRES: asserts
+; RUN: llc -debug-only=regalloc < %s 2>&1 |FileCheck %s --check-prefix=DEBUG
+
+; DEBUG-COUNT-3: AllocationOrder(VRSAVERC) = [ ]
+
+target triple = "powerpc64le-unknown-linux-gnu"
+
+define hidden fastcc void @test() {
+freescalar:
+ %0 = load i32, i32* undef, align 4
+ br label %if.end420
+
+if.end420: ; preds = %freescalar
+ br label %free_rv
+
+free_rv: ; preds = %if.end420
+ %and427 = and i32 %0, -2147481600
+ %cmp428 = icmp eq i32 %and427, -2147481600
+ br i1 %cmp428, label %if.then430, label %free_body
+
+if.then430: ; preds = %free_rv
+ call fastcc void undef()
+ br label %free_body
+
+free_body: ; preds = %if.then430, %free_rv
+ %or502 = or i32 undef, 255
+ store i32 %or502, i32* undef, align 4
+ ret void
+}
+