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| author | Simon Atanasyan <simon@atanasyan.com> | 2019-01-30 22:45:12 +0000 |
|---|---|---|
| committer | Simon Atanasyan <simon@atanasyan.com> | 2019-01-30 22:45:12 +0000 |
| commit | 8a11e14ef3568455b0e61467a8d578bbb760d3bb (patch) | |
| tree | 1cf5fb7fcef8f1c0de4c603a2eb46055df4724fc | |
| parent | dfc033d9a486a8c1bfd54f829112df65a53d8053 (diff) | |
| download | llvm-8a11e14ef3568455b0e61467a8d578bbb760d3bb.zip llvm-8a11e14ef3568455b0e61467a8d578bbb760d3bb.tar.gz llvm-8a11e14ef3568455b0e61467a8d578bbb760d3bb.tar.bz2 | |
[docs][mips] 8.0 Release notes
MIPS specific part of LLVM 8.0 Release notes.
Differential Revision: http://reviews.llvm.org/D57457
llvm-svn: 352682
| -rw-r--r-- | llvm/docs/ReleaseNotes.rst | 19 |
1 files changed, 18 insertions, 1 deletions
diff --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst index cb80459..82e4d56 100644 --- a/llvm/docs/ReleaseNotes.rst +++ b/llvm/docs/ReleaseNotes.rst @@ -52,6 +52,8 @@ Non-comprehensive list of changes in this release from a dll are accessed via a stub, to allow the linker to convert it to a dllimport if needed. +* Added support for labels as offsets in ``.reloc`` directive. + .. NOTE If you would like to document a larger change, then you can add a subsection about it right here. You can copy the following boilerplate @@ -82,8 +84,23 @@ Changes to the ARM Backend Changes to the MIPS Target -------------------------- - During this release ... +* Improved support of GlobalISel instruction selection framework. + +* Implemented emission of ``R_MIPS_JALR`` and ``R_MICROMIPS_JALR`` + relocations. These relocations provide hints to a linker for optimization + of jumps to protected symbols. + +* ORC JIT has been supported for MIPS and MIPS64 architectures. + +* Assembler now suggests alternative MIPS instruction mnemonics when + an invalid one is specified. + +* Improved support for MIPS N32 ABI. + +* Added new instructions (``pll.ps``, ``plu.ps``, ``cvt.s.pu``, + ``cvt.s.pl``, ``cvt.ps``, ``sigrie``). +* Numerous bug fixes and code cleanups. Changes to the PowerPC Target ----------------------------- |