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author | Bill Wendling <isanbard@gmail.com> | 2013-06-07 10:52:37 +0000 |
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committer | Bill Wendling <isanbard@gmail.com> | 2013-06-07 10:52:37 +0000 |
commit | 465d2ab836ab3907916652ac93a715364b53e0b2 (patch) | |
tree | 415b6b0a72dd074a9ac9c975dce2fe680c7e1746 | |
parent | 4a1dd376af39c9df752915dca34a990be9535d91 (diff) | |
download | llvm-llvmorg-3.3.0.zip llvm-llvmorg-3.3.0.tar.gz llvm-llvmorg-3.3.0.tar.bz2 |
Add blurb for PowerPC.llvmorg-3.3.0
llvm-svn: 183500
-rw-r--r-- | llvm/docs/ReleaseNotes.rst | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst index 112662c..f2afdc9 100644 --- a/llvm/docs/ReleaseNotes.rst +++ b/llvm/docs/ReleaseNotes.rst @@ -114,6 +114,30 @@ New features and improvements: - Delay slot filler pass can now search successor blocks for instructions to fill delay slots (use option -disable-mips-df-succbb-search=false). +PowerPC Target +-------------- + +New features and improvements: + +- PowerPC now supports an assembly parser. +- Support added for thread-local storage. 64-bit ELF subtarget only. +- Support added for medium and large code model (-mcmodel=medium,large). + Medium code model is now the default. 64-bit ELF subtarget only. +- Improved register allocation (fewer reserved registers). +- 64-bit atomic load and store are now supported. +- Improved code generation for unaligned memory accesses of scalar types. +- Improved performance of floating-point divide and square root + with -ffast-math. +- Support for predicated returns. +- Improved code generation for comparisons. +- Support added for inline setjmp and longjmp. +- Support added for many instructions introduced in PowerISA 2.04, 2.05, + and 2.06. +- Improved spill code for vector registers. +- Support added for -mno-altivec. +- ABI compatibility fixes for complex parameters, 128-bit integer parameters, + and varargs functions. 64-bit ELF subtarget only. + Loop Vectorizer --------------- |